Phase detection system

Abstract

A method for determining the relative phase angle between a known reference and a signal under test includes the steps of providing a reference signal to a multi-tap delay line, where the number of taps is at least equal to the number of phases into which the signal under test is to be resolved, and then clocking a parallel shift register by the signal under test to capture the value of the delay line taps.

What is claimed is: 
     
       1. A method of determining relative phase angle between a known reference and a signal under test including the steps of providing a reference signal to a multi-tap delay line, the number of taps being at least equal to the number of phases into which the signal under test is to be resolved, and   clocking a parallel shift register by the signal under test to capture the value of each of the delay line taps.   
     
     
       2. A method of determining whether the phase of a sample waveform is in the early or late phases of a clock cycle including the steps of generating an edge trigger signal,   developing a synchronizing signal in response to the edge trigger signal and a clock signal,   developing a delayed clock signal in response to the edge trigger signal, and   developing an early phase signal in response to the synchronizing signal as a data input and the delayed clock signal as a clocking input, wherein the early phase signal may be high or low depending on the state of the synchronizing signal at the time the delayed clock signal changes state.