P
US4885718AExpiredUtilityPatentIndex 92

Extended communications link for keyboard and display units remotely located from a computer

Assignee: CYBEX CORPPriority: Sep 11, 1987Filed: Sep 11, 1987Granted: Dec 5, 1989
Est. expirySep 11, 2007(expired)· nominal 20-yr term from priority
Inventors:ASPREY ROBERT RSHATAS REMIGIUS G
H04L 25/08G09G 5/006G06F 3/0227
92
PatentIndex Score
33
Cited by
9
References
2
Claims

Abstract

A communications extension link for use between a computer and a keyboard and display unit has at the computer site a first interface circuit connected to it and adjacent to the keyboard and display unit a second interface circuit connected to it. The two interface circuits may then be spaced serveral hundred feet by an extension cable. The first interface circuit includes capacitors connected between keyboard data and clock lines and a positive supply terminal, and buffer amplifiers are placed in the signal lines relating to the display unit. The second interface circuit employs discrete resistors between clock and data lines and the positive supply terminal, and between the vertical sync line and logic ground. In addition, capacitance is added between the positive supply terminal and logic ground.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A communications link extending up to 150 feet for coupling the keyboard and monitor connections of a digital computer to a keyboard and monochrome monitor, comprising: a first signal conditioning assembly positionable generally proximate to a digital computer, comprising:   a first housing,   first cable receptacle terminals supported by said housing and disposed for electrically coupled engagement with a computer-keyboard cable, said first cable receptacle terminals comprising clock, data, positive bias voltage, logic ground, and chassis ground terminals,   second cable receptacle terminals supported by said first housing and disposed for electrically coupled engagement with a computer-monitor cable, comprising horizontal sync, vertical sync, video, intensity, and chassis ground terminals,   third cable receptacle terminals supported by said first housing and comprising clock, data, positive bias voltage, logic ground, horizontal sync, vertical sync, video, video related signal, and chassis ground terminals, and said clock, data, positive bias voltage, logic ground, and chassis ground terminals, and said last-named clock, data, positive bias voltage, logic ground terminals being connected to like designated receptacle terminals of said first and second receptacle terminals, and   a first capacitor within said first housing having capacitance of approximately 0.002 mf connected between said clock terminal and positive bias voltage terminal, and a second capacitor within said housing having a capacitance of approximately 0.006 mf connected between said data terminal and a said positive bias voltage terminal;   a relatively large capacitor and a relatively small capacitor within said first housing, both being connected between a said positive bias voltage terminal and logic ground terminal, wherein said relatively large capacitor has capacitance on the order of 22 mf, and said relatively small capacitor has a capacitance on the order of 0.1 mf;   a first logic amplifier being connected in circuit between said horizontal sync terminals and a second logic amplifier being connected in circuit between said vertical sync terminals;   a resistor and third logic amplifier serially in circuit in the named order from said video terminal of said second cable receptacle terminals and said video terminal of said third cable receptacle terminals;   a resistor and fourth logic amplifier serially in circuit in the last-named order between said intensity terminal of said second cable receptacle terminals and said video related terminal of said third cable receptacle terminals;   an elongated cable having a first set of terminals at one end disposed for electrically coupled engagement with said third cable receptacle terminals and having at an opposite end an interconnected set of like identified terminals; and   a second signal conditioning assembly comprising: a second housing,   fourth cable receptacle terminals supported by said second housing and having clock, data, positive bias voltage, logic ground, vertical sync, horizontal sync, video, and video related cable receptacle terminals adapted to receive the opposite end terminals of said elongated cable,   fifth cable receptacle terminals, keyboard terminals, supported by said second housing and having clock, data, positive bias voltage, logic ground, and chassis ground terminals connected to like designated terminals of said fourth cable receptacle terminals,   sixth cable receptacle terminals, monitor terminals, having vertical sync, horizontal sync, video, video related, and chassis ground terminals connected to like designated terminals of said fourth cable receptacle terminals,   a first resistor connected between said clock terminal and positive bias voltage terminal, and a second resistor connected between said data terminal and said positive bias voltage terminal, wherein each of said first and second resistors having a value of approximately 1,000 ohms,   a relatively large capacitor and a relatively small capacitor connected between said positive bias voltage terminal and logic ground terminal of said second signal conditioning assembly, wherein said relatively large capacitor has capacitance on the order of 22 mf, and said relatively small capacitor has a capacitance on the order of 0.1 mf, and   a third resistor having a resistance value of approximately 150 ohms connected between said vertical sync and logic ground terminals.     
     
     
       2. A communications link as set forth in claim 1 wherein said first signal conditioning assembly further comprises: a composite video input terminal;   a switch having first and second switchable inputs and an output, said output connected to said video related terminal of said third cable receptacle terminals;   an amplifier having an input connected to said composite video input and an output connected to said first switchable input of said switch and said second switchable input being connected to the output of said fourth logic amplifier, whereby either an amplified version of an intensity signal is supplied to said video related terminal of said third cable receptacle terminals, or an amplified composite video signal is applied to said video related terminal of said third cable receptacle terminals; and   said second signal conditioning assembly includes a composite video output terminal supported by said second housing and further including an electrical resistor connected between said composite video output terminal and said video related signal terminal of said second signal conditioning assembly.

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