High speed half duplex modem with fast turnaround protocol

Abstract

A phase locked loop circuit which eliminates the phase difference between an incoming reference signal and a sampling signal by sampling the incoming reference signal to produce a sampled signal. The sign of the sampled signal at two sample points is compared to determine in which quadrant a predetermined one of these sample points is located. The phase adjustment to the sampling signal is dependent upon the quadrant in which this sample point is located and the magnitude of this sample point. A large phase difference produces a large phase adjustment so that this sample point is quickly locked onto the zero-crossing points of the incoming reference signal. A small phase difference produces a small phase adjustment and prevents jitter. The lock onto the zero-crossing point of the incoming reference signal minimizes the data error rate of the modem.

We claim: 
     
       1. An improved method for locking a sampling signal onto a predetermined zero-crossing point of a reference signal having a characteristic frequency, said sampling signal having a sampling frequency and a phase with respect to said reference signal, comprising: (a) sampling said reference siagnal at said sampling frequency to obtain a plurality of sampling points, said sampling frequency being a multiple M of said characteristics frequency, M being an integer greater than three;   (b) designating one of said sampling points as a primary sampling point;   (c) using said primary sampling point and a secondary sampling point to determine in which quadrant of said reference signal that said primary sampling point lies;   (d) using said primary sampling point and said secondary sampling point to calculate a phase difference between said primary sampling point and said predetermined zero-crossing point; and   (e) adjusting said phase of said sampling signal by a phase step size which reduces said phase difference.   
     
     
       2. The method of claim 1 wherein said predetermined zero-crossing point is a positive-going zero-crossing point. 
     
     
       3. The method of claim 1 wherein said predetermined zero-crossing point is a negative-going zero-crossing point. 
     
     
       4. The method of claim 1 wherein M equals four. 
     
     
       5. The method of claim 2 wherein M equals four. 
     
     
       6. The method of claim 3 wherein M equals four. 
     
     
       7. The method of claim 1 wherein said secondary sampling point immediately precedes said primary sampling point. 
     
     
       8. The method of claim 1 wherein said primary sampling point lags said secondary sampling point by approximately 90° of phase of said reference signal. 
     
     
       9. The method of claim 1 wherein said phase step size is responsive to said phase difference. 
     
     
       10. An improved method for locking a sampling signal onto a predetermined zero-crossing point of a reference signal having a characteristic frequency, comprising: (a) sampling said reference signal at a first sample point and a second sample point to obtain a first sample and a second sample, respectively;   (b) using said first sample and said second sample to determine in which quadrant of said reference signal that a selected point of said first sample point and said second sample point lies and to calculate a phase difference between said selected point and said predetermined zero-crossing point;   (c) adjusting said first point and said second point in repsonse to said phase difference; and   (d) repeating steps (a) through (c) at least until said phase difference has a magnitude which is less than a predetermined tolerance.   
     
     
       11. The method of claim 10 wherein said predetermined zero-crossing point is a positive-going zero-crossing point. 
     
     
       12. The method of claim 10 wherein said predetermined zero-crossing point is a negative-going zero-crossing point. 
     
     
       13. The method of claim 10 wherein said second sample point lags said first sample point by approximately 90° of phase of said reference signal. 
     
     
       14. The method of claim 10 wherein said selected point is said second sample point. 
     
     
       15. The method of claim 10 wherein step (c) comprises: (c)(1) determining a phase step size responsive to said phase difference;   (c)(2) adjusting said first sample point and said second sample point by said phase step size.   
     
     
       16. The method of claim 10 wherein said first sample point immediately precedes said second sample point.