Digital-to-analog converting field effect device and circuitry

Abstract

A field effect device and circuit suitable for providing an analog output signal having a magnitude which is representative of a digital input code having a sequence of bits. The device includes a plurality of gate electrodes located between an input electrode and an output electrode. The gate electrodes have unequal lengths to provide different gate widths each representative of the magnitude of a portion of an analog signal provided at the output electrode in response to a digital signal of a particular logic state, such as a logical "one", when applied to any one of the gate electrodes. Thus, the magnitude of the current conducted between the input electrode and the output electrode is responsive to the sum of the widths of the gates receiving the digital signal of a particular logic state.

We claim: 
     
       1. A field effect device suitable for providing an analog output signal having a magnitude which is representative of a digital input code having a sequence of bits, the field effect device including in combination: an input electrode;   an output electrode;   a plurality of gate electrodes located between said input electrode and said output electrode, said gate electrodes providing different gate widths, each of said gate widths being representative of the magnitude of the analog signal to be provided at said output electrode in response to a digital input signal of a particular logic state to be applied to said gate electrode;   means for applying selected digital bits separately to each of said gate electrodes to independently control each of said gate electrodes; and   the magnitude of the current conducted between said input electrode and said output electrode thereby being adapted to be responsive to the total of the widths of the gates receiving said digital signal of said particular logic state.   
     
     
       2. The field effect device of claim 1 wherein: the digital input code includes a plurality of bits representing a number ranging from a least significant bit to a most significant bit; and   one of said gate electrodes being adapted to receive said least significant bit, said one said gate electrode providing a gate having the smallest gate width; and   said widths of said others gates being multiples of said smallest gate width, all of said gates thereby being adapted to selectively allow currents to flow between said input and output electrodes having predetermined magnitudes in response to receiving said digital signals of said particular logic state.   
     
     
       3. The field effect device of claim 2 wherein said multiple equals 2 N  where N is a whole integer. 
     
     
       4. The field effect device of claim 1 being provided in a metal oxide semiconductor field effect transistor structure. 
     
     
       5. The field effect device of claim 1 being provided in a junction field effect transistor structure. 
     
     
       6. The field effect device of claim 1 being provided in a metal insulator field effect transistor structure. 
     
     
       7. The field effect device of claim 1 wherein: one of said input and output electrodes has a first side and a second side;   said other of said input and output electrodes is juxtapositioned along said first side of said one electrode;   a semiconductor region having a surface located between said other electrode and said first side of said one electrode; and   said gate electrodes having different gate widths being located on said surface of said semiconductor region.   
     
     
       8. The field effect device of claim 7 wherein said gate electrodes are located substantially along a common axis and wherein current flows in only one direction perpendicular to said common axis. 
     
     
       9. The field effect device of claim 7, further including: a further electrode juxtapositioned along said second side of said one electrode;   a further semiconductor region having a surface located between said second side of said one electrode and said further electrode; and   additional gate electrodes having selected gate widths being located on said surface of said further semiconductor region.   
     
     
       10. A circuit for converting digital signals to analog form including: field effect means having a source electrode, a drain electrode and a plurality of gate electrodes;   first power supply conductor means;   first means coupling said first power supply conductor means to said source electrode;   second power supply conductor means;   second means coupling said second power supply means to said drain electrode; and   means adapted to couple the digital signals separately to each of said gate electrodes to independently control said gate electrodes, said gate electrodes having different gate widths proportional to the magnitude of the analog signal to be provided at said drain electrode in response to a digital signal of a particular logic state applied to each of said gate electrodes.   
     
     
       11. The circuit of claim 10 wherein said field effect means includes: a further source electrode;   a further plurality of gate electrodes located between said further source electrode and said drain electrode; and   further means adapted to couple selected digital signals to each of said further plurality of gate electrodes.   
     
     
       12. The circuit of claim 10 wherein said first means includes a bias circuit. 
     
     
       13. The circuit of claim 10 wherein said second means includes an electrical load. 
     
     
       14. A field effect device suitable for providing an analog output signal having a magnitude which is representative of a digital input code having a sequence of bits, the digital input code including a plurality of bits representing a number ranging from a least significant bit to a most significant bit, the field effect device including in combination: an input electrode;   an output electrode;   a plurality of gate electrodes located between said input electrode and said output electrode, said gate electrodes providing different gate widths, each of said gate widths being representative of the magnitude of the analog signal to be provided at said output electrode in response to a digital input signal of a particular logic state to be applied to said gate electrode, one of said gate electrodes being adapted to receive said least significant bit, said one said gate electrode providing a gate having the smallest width, said widths of said other gates being multiples of said smallest width wherein said multiple equals 2 N  where N is a whole integer, and all of said gates thereby being adapted to selectively allow currents to flow between said input and output electrodes having predetermined magnitudes in response to receiving said digital signals of said particular logic state;   means for applying selected bits to each of said gate electrodes; and   the magnitude of the current conducted between said input electrode and said output electrode thereby being adaptive to be responsive to the total of the widths of the gates receiving said digital signal of said particular logic state.   
     
     
       15. The field effect device of claim 14 wherein one of said input and output electrodes has a first side and a second side; said other said input and output electrodes is juxtapositioned along said first side of said one electrode;   a semiconductor region having a surface located between said other electrode and said first side of said one electrode; and   said gate electrodes having different widths being located on said surface of said semiconductor region.   
     
     
       16. A field effect device suitable for providing an analog output signal having a magnitude which is representative of a digital input code having a sequence of bits, the field device including in combination: a first input electrode;   an output electrode;   said output electrode having a first side and a second side;   said first input electrode being juxtapositioned along said first side of said output electrode;   a first semiconductor region having a surface located between said first input electrode and said first side of said output electrode;   a first plurality of gate electrodes located on said surface of said first semiconductor region between said input electrode and said output electrode, said gate electrodes providing selected gate widths;   a second input electrode juxtapositioned along said second side of said output electrode;   a second semiconductor region having a surface located between said second side of said output electrode and said second input electrode;   a second plurality of gate electrodes having selected gate widths being located on said surface of said second semiconductor region;   means for applying selected digital bits to each of said gate electrodes;   each of said gate widths being representative of the magnitude of the analog signal to be provided at said output electrode in response to a digital input signal of a particular logic state to be applied to said gate electrode; and   the magnitude of the current conducted between said input and said output electrode thereby being adapted to be responsive to the total of the widths of the gates receiving said digital signal of said particular logic state.   
     
     
       17. The field effect device of claim 1, further including: semiconductor material located under each of said gate electrodes; and   said semiconductor material under a gate electrode being rendered fully conductive in response to a digital input signal of said particular logic state being applied to the gate electrode and nonconductive in response to a digital input signal not of said particular logic state being applied to the gate electrode.   
     
     
       18. The circuit of claim 10, further including: semiconductor material located under each of said gate electrodes; and   said semiconductor material under a gate electrode being rendered fully conductive in response to a digital input signal of said particular logic state being applied to the gate electrode and nonconductive in response to a digital input signal not of said particular logic state being applied to the gate electrode.