Scan converter with adaptive vertical filter for single bit computer graphics systems

Abstract

A television scan conversion method receives and stores incoming pixel bits are stored in a pixel memory array at a first scan rate. Vertical columns of adjacent pixel bits of plural scan lines from the pixel memory array are read out at a second scan rate. A filter coefficient is generated by detecting a bit pattern located in each vertical column of pixel bits retrieved from the pixel memory array. Delay matched predetermined adjacent groups of pixel bits in each vertical column are adaptively low pass filtered in response to the filter coefficient so as to minimize video flicker artifacts in a resultant stream of interpolation pixels in accordance with the bit patterns detected by the pattern recognition filter coefficient generator. An interpolation coefficient is generated for each interpolation pixel, and plural-bit interpolation pixels are put out as a stream at the second scan rate.

I claim: 
     
       1. A television scan converter for converting video generated by single pixel bit computer graphics systems at a first scan rate into analog video at a second scan rate which is different than the first rate, the converter comprising: clocking means responsive to horizontal, vertical and pixel clock frequencies at the first scan rate and horizontal, vertical and pixel clock frequencies at the second scan rate for generating clocking signals,   pixel memory array means for storing incoming pixel bits at the first scan rate and for retrieving vertical columns of predetermined numbers of vertically adjacent pixel bits of plural scan lines at the second scan rate,   memory address controller means responsive to the clocking means for generating and putting out pixel bit storage and retrieval addresses to the pixel memory array means,   pattern recognition filter coefficient generator means for generating a filter coefficient by detecting a bit pattern of each said vertical column of pixel bits read out from the pixel memory array means,   adaptive vertical low pass filter means connected to receive delay matched predetermined adjacent groups of pixel bits of said vertical column for adaptively low pass filtering the predetermined adjacent groups in response to the filter coefficient, so as to minimize video flicker artifacts in resultant interpolation pixels at the second scan rate in accordance with the bit patterns detected by the pattern recognition filter coefficient generator means,   interpolator means connected to the adaptive vertical low pass filter means and responsive to an interpolation coefficient C, for generating and putting out as a stream the interpolation pixels at the second scan rate, and   interpolation coefficient generator means responsive to the clocking means for generating the interpolation coefficient C for each interpolation pixel for controlling operation of the interpolator means.   
     
     
       2. The television scan converter set forth in claim 1 further comprising digital to analog converter means for converting the plural bit interpolation pixels put out by the interpolator means into an analog data stream comprising horizontal scan lines for display at the second scan rate. 
     
     
       3. The television scan converter set forth in claim 1 wherein the first scan rate is 370 progressive scan lines per frame at an approximate 60 Hz frame rate, and the second scan rate is 525 scan lines interlaced per frame at an approximate 30 Hz frame rate. 
     
     
       4. The television scan converter set forth in claim 1 wherein the pattern recognition filter coefficient generator means, the adaptive vertical low pass filter means and the interpolator means are implemented as a programmed read only memory array. 
     
     
       5. The television scan converter set forth in claim 1 wherein the pattern recognition filter coefficient generator means detects plural predetermined vertical pixel patterns including alternating black and white pixels, single pixel (horizontal line), dual pixel (horizontal bar) and pixel step or window from said bit pattern for each said vertical column read out from the pixel memory array means. 
     
     
       6. The television scan converter set forth in claim 1 wherein the pixel memory array means stores at least six vertical pixel bits b[0], b[1], b[2], b[3], b[4] and b[5] for each interpolation pixel i, and wherein the adaptive vertical low pass filter means provides two filter outputs R and S in accordance with the following relationship: ##EQU3## 
     
     
       7. The television scan converter set forth in claim 6 wherein the interpolator means receives the two filter outputs R and S and puts out the interpolation pixel i, in accordance with the following:   i=]C * R]+[BAR C * S],     wherein C and BAR C lie in a range between zero and unity, and wherein BAR C is the complement of C.   
     
     
       8. The television scan converter set forth in claim 7 wherein the pattern recognition filter coefficient generator means generates the filter coefficient as a value lying in a range between zero and fifteen. 
     
     
       9. The television scan converter set forth in claim 6 wherein the adaptive vertical low pass filter means comprises two adaptive transversal low pass filters, a first filter connected to receive from the pixel memory array means and to adaptively filter pixel bits b[1], b[2] and b[3] and put out R for each interpolation pixel i to be generated; and, a second filter connected to receive from the pixel memory array means and to adaptively filter pixel bits b[2], b[3] and b[4] and put out S for each interpolation pixel i to be generated. 
     
     
       10. The television scan converter set forth in claim 9 further comprising a delay match in each path between the pixel memory array means and the first and second filters, in order to match the delay incurred in the pattern recognition filter coefficient generator means. 
     
     
       11. The television scan converter set forth in claim 9 wherein the interpolator means comprises two multipliers, a first multiplier which receives the output R and a second multiplier which receives the output S, wherein the first multiplier multiplies R by the interpolation coefficient C, wherein the second multiplier multiplies S a complement interpolation coefficient BAR C, and wherein C and BAR C lie in a range between zero and unity, and further comprising summing means for summing outputs from the first and second multipliers. 
     
     
       12. The television scan converter set forth in claim 1 wherein the interpolator means generates and puts out each interpolation pixel having a plural-bit gray scale. 
     
     
       13. A method for converting video generated by single pixel bit computer graphics systems at a first scan rate into analog video at a second scan rate which is different than the first rate, the method comprising the steps of: generating clocking signals responsive to horizontal, vertical and pixel clock frequencies at the first scan rate and horizontal, vertical and pixel clock frequencies at the second scan rate,   storing incoming pixel bits in a pixel memory array means at the first scan rate and retrieving vertical columns of predetermined numbers of vertically adjacent pixel bits of plural scan lines from the pixel memory array means at the second scan rate,   generating and putting out pixel bit storage and retrieval addresses to the pixel memory array means in order to carry out the said storing and retrieving steps,   generating a filter coefficient by detecting a bit pattern of each said vertical column of pixel bits retrieved from the pixel memory array means,   adaptively low pass filtering delay matched predetermined adjacent groups of pixel bits in said vertical column in response to the filter coefficient so as to minimize video flicker artifacts in a resultant stream of interpolation pixels i in accordance with the bit patterns detected by the pattern recognition filter coefficient generator means,   interpolating a scan converted pixel i by generating and putting out as a stream the interpolation pixels at the second scan rate in response to an interpolation coefficient C, and   generating the interpolation coefficient C for each interpolation pixel for controlling the operation of the interpolation step.   
     
     
       14. The scan converting method set forth in claim 13 comprising the further step of converting the stream of interpolation pixels put out by the interpolation step into an analog data stream comprising horizontal scan lines for display at the second scan rate. 
     
     
       15. The scan converting method as set forth in claim 13 wherein the step of interpolating a scan converted pixel i by generating and putting out as a stream the interpolation pixels at the second scan rate includes the step of generating and putting out each interpolation pixel with a plural-bit gray scale. 
     
     
       16. The scan converting method set forth in claim 13 wherein the first scan rate is 370 progressive scan lines per frame at an approximate 60 Hz frame rate, and the second scan rate is 525 scan lines interlaced per frame at an approximate 30 Hz frame rate. 
     
     
       17. The scan converting method set forth in claim 13 wherein the storing step stores at least six vertical pixel bits b[0], b[1], b[2], b[3], b[4] and b[5] for each interpolation pixel i, and wherein the adaptive low pass filtering step results in two filter outputs R and S in accordance with the following relationship: ##EQU4## 
     
     
       18. The scan converting method set forth in claim 17 wherein the interpolating step receives the two filter outputs R and S and puts out the interpolation pixel i, in accordance with the following:   i=[C * R]+[BAR C * S],     wherein C and BAR C lie in a range between zero and unity, and wherein BAR C is the complement of C.   
     
     
       19. The scan converting method set forth in claim 13 wherein the generating a filter coefficient step comprises the step of generating the filter coefficient as a value lying in a range between zero and fifteen. 
     
     
       20. A method for controlling the amount of vertical low pass filtering within a scan converter for converting video generated by single pixel bit computer graphics systems at a first scan rate into analog video at a second scan rate comprising the steps of reading a bit pattern of a vertical column of pixel bits retrieved from a pixel memory array means, detecting a number of vertical impulses occurring in the read bit pattern and establishing the magnitude of a filter coefficient for controlling the amount of vertical low pass filtering in relation to the number of detected vertical impulses occurring within the vertical bit pattern.