Amplifier circuit

Abstract

An offset voltage at one pair of differential amplifier transistors for effecting the differential amplification of an input signal is suppressed. To achieve this aim, the base current of a pair of differential amplifier transistors is supplied from a current generator circuit separately provided. This current generator circuit has a very small current flow, and is composed of another pair of differential amplifier transistors to which a reference voltage identical with the bias voltage of the first differential amplifier transistors is applied, a transistor for reference current use for delivering a current at a current density identical with the current density of the first differential amplifier transistors, a base current supply transistor for supplying power to the reference current transistor, and two current supply transistors for delivering a current identical with the current of the simulation base-current supply transistor. The transistors of the second differential amplifier act to make the base potential of the transistor for operation simulation use identical with a reference voltage, and then the simulation base current supply transistor supplies the base current to the operation simulation transistor. Thereafter, since the transistor for base current supply use delivers an identical current to the base current from the simulation base current supply transistor, the occurrence of the offset voltage in the differential amplifier transistors can be suppressed.

What is claimed is: 
     
       1. An amplifier circuit comprising: (a) a first differential amplifier circuit for outputting a signal by differentially amplifying an input signal, the first differential amplifier circuit including,   a first transistor being supplied with the input signal at its base,   a second transistor having the emitter connected to the emitter of the first transistor, and   a first current source transistor having the collector connected to the common emitters of the first and second transistors for determining the amount of current which flows in both the first and second transistors;   (b) a second differential amplifier circuit for outputting a signal in response to a reference voltage, the second differential amplifier circuit including,   a third transistor which has the reference voltage applied to the base thereof,   a fourth transistor having the emitter connected to the emitter of the third transistor, and   a second current source transistor having the collector connected to the common emitters of the third and fourth transistors for determining the amount of current which flows in both the third and fourth transistors; and   (c) a current generator circuit for supplying a current in response to the output current of the second differential amplifier circuit to the bases of both the first and second transistors, the current generator circuit including,   a fifth transistor having the base connected to the base of the fourth transistor for delivering a current larger than the current delivered from the fourth transistor,   a sixth transistor for supplying a base current to the fifth transistor in response to the output current of the second differential amplifier circuit, and   seventh and eighth transistors having the base and emitters respectively connected to the base and emitter of the sixth transistor for supplying a current to the bases of both the first and second transistors.   
     
     
       2. An amplifier circuit according to claim 1, wherein the first, second and fifth transistors have identical characteristics. 
     
     
       3. An amplifier circuit according to claim 2, wherein a third current source transistor is provided at the emitter of the fifth transistor for serving to supply half of the current of the first current source transistor to the fifth transistor. 
     
     
       4. An amplifier circuit according to claim 3, wherein the amount of current of the second current source transistor is selected to be less than 1/5 of the current of the third transistor. 
     
     
       5. An amplifier circuit according to claim 1, wherein the amplifier circuit is a multistage amplifier.