A/D convertor of the pipeline type having additional comparators for use in setting a specified reference voltage

Abstract

In an A/D convertor, one comparator is provided for the most significant bit of the output digital signal, two for the second bit, and three each for the third and lower-order bits. When a compare operation is being performed by one of the three comparators that are provided for each of the third and lower bits, the remaining two comparators provide outputs in response to which output switch circuits perform setting of two reference voltages that are specified by the comparison result of a comparator corresponding to an output digital signal two bits higher.

We claim: 
     
       1. An A/D convertor comprising: at least three comparators provided for each lower order bit of an output digital signal, said output digital signal consisting of a plurality of bits;   means for producing a plurality of reference voltages; and   means for setting a specified reference voltage for each of the comparators;   wherein when one of the three comparators is performing a compare operation on an input analog signal, the means for setting performs said setting of said specified reference voltage in response to outputs from remaining comparators.   
     
     
       2. An A/D convertor according to claim 1, wherein one of said reference voltages is selectively specified as said specified reference voltage according to a result of a comparison by a comparator that corresponds to a bit of said output digital signal at least two bits higher than a bit of said output digital signal that corresponds to a comparator which makes use of said specified reference voltage. 
     
     
       3. An A/D convertor according to claim 2, wherein one comparator is provided corresponding to the most significant bit of the output digital signal, two comparators are provided corresponding to the second most significant bit of the output digital signal, and said at least three comparators are provided corresponding to each of the third most significant and lower order bits of the output digital signal. 
     
     
       4. An A/D convertor according to claim 3, further comprising: a plurality of sample-and-hold circuits for receiving input analog signals;   an input switch section for selectively transferring to a specified comparator a sampled voltage held by a specified sample-and-hold circuit and said specified reference voltage;   an output switch section of selectively transferring an output signal of the specified comparator; and   a shift register for receiving the output signal of the output switch section.   
     
     
       5. A/D convertor according to claim 4, wherein said input switch section is a switch matrix in which unit switch circuits are arranged in matrix. 
     
     
       6. A transmission system comprising: a telephone circuit for transmitting analog signals;   a digital signal processor for processing digital signals; and   an A/D convertor having its input terminal coupled to said telephone circuit and its output terminal coupled to said digital signal processor,   said A/D convertor comprising:   at least three comparators provided for each lower order bit of an output digital signal, said output digital signal consisting of a plurality of bits;   means for producing a plurality of reference voltage; and   means for setting a specified reference voltage for each of the comparators;   wherein when one of the three comparators is performing a compare operation on an input analog signal, the means for setting performs said setting of said specified reference voltage in response to outputs from remaining comparators.   
     
     
       7. An A/D convertor according to claim 6, wherein one of said reference voltages is selective specified as said specified reference voltage according to a result of a comparison by a comparator that corresponds to a bit of said output digital signal at least two bits higher than a bit of said output digital signal that corresponds to a comparator which makes use of said specified reference voltage. 
     
     
       8. An A/D convertor according to claim 7, wherein one comparator is provided corresponding to the most significant bit of the output digital signal, two comparators are provided corresponding to the second most significant bit of the output digital signal, and said at least three comparators are provided corresponding to each of the third most significant and lower-order bits of the output digital signal. 
     
     
       9. An A/D convertor according to claim 8, further comprising: a plurality of sample-and-hold circuits for receiving in put analog signals;   an input switch section for selectively transferring to a specified comparator a sampled voltage held by a specified sample-and-hold circuit and said specified reference voltage;   an output switch section of selectively transferring an output signal of the specified comparator; and   a shift register for receiving the output signal of the output switch section.   
     
     
       10. A/D convertor according to claim 9, wherein said input switch section is a switch matrix in which unit switch circuits are arranged in matrix.