Recording position compensation circuit for use in digital information recording-reproduction apparatus
Abstract
A recording position compensation circuit for use in the digital information recording-reproduction apparatus of the present disclosure has a microprocessor for generating an offset signal indicating a deviation between standard signal processing time, which is required for a process wherein digital medium information already recorded on the recording medium is reproduced through the advanced reproduction head and re-recorded on the recording medium through the recording head, and inter-head travelling time required for the recording medium to travel a distance from the advanced reproduction head to the recording head. A first counter generates a reference symbol pointer indicating a reference of a sequence whereby digital information stored in the memory is read out so that a part of the digital information is rewritten. A second counter generates a compensated symbol pointer having a phase difference corresponding to the deviation with respect to the reference symbol pointer. Thus, since digital information is read out from the memory so that the signal processing time from reproduction to re-recording may coincide with the inter-head travelling time, a recording position on the recording medium at which rewriting is performed, is corrected.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A recording position compensation circuit for use in a digital information recording-reproduction apparatus in accordance with the present invention comprising: advanced reproduction head means disposed at a upstream position in a travelling path of a recording medium; recording head means disposed at a downstream position in the travelling path of the recording medium; memory means for successively storing in a predetermined address digital information to be recorded on the recording medium through the recording head means; offset generation means for generating an offset signal indicating a deviation between standard signal processing time, which is required for a process wherein digital medium information recorded on the recording medium is reproduced through the advanced reproduction head means and re-recorded on the recording medium through the recording head means, and inter-head travelling time which is required for the recording medium to travel a distance from the advanced reproduction head means to the recording head means; reference read-out sequence generation means for generating a reference sequencing signal indicated a reference of a sequence whereby the digital information stored in the memory means is read out so that a part of the digital medium information is rewritten through the recording head means; compensation read-out sequence generation means for generating a compensation sequencing signal indicating an actual sequence whereby the digital information stored in the memory means is read out so that a part of the digital medium information is rewritten through the recording head means; phase difference generation means for generating a phase difference signal which resets the compensation read-out sequence generation means so as to bring about a phase difference between the reference sequencing signal and the compensation sequencing signal, the phase difference corresponding to a deviation indicated by the offset signal; and address generation means for specifying an address in the memory means required for reading out the digital information stored in the memory means, based on the compensation sequencing signal.
2. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 1, further comprising reproduction circuit means for producing a reproduction information symbol according to the medium information reproduced from the recording medium through the advanced reproduction head means.
3. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 2, wherein the memory means comprises a shift register for storing digital information of one symbol per stage, that is, 8 bits per stage, whereby, suppose a standard distance between the advanced reproduction head means and the recording head means is HA; the recording medium travels at a speed of V o ; the medium information is reproduced at a standard reproduction bit rate R o per track through the advanced reproduction head means; and the number of standard stages per track which is required for the shift register is D 2 ; the following equation holds in the recording position compensation circuit of the digital information recording-reproduction apparatus: ##EQU5## .
4. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 3, wherein the reference read-out sequence generation means comprises a first counter, the first counter being arranged to count symbol clock pulses generated according to the standard reproduction bit rate R o and generate a reference symbol pointer indicating a reference sequence required in reading out for every unit of symbol the digital information stored in the shift register.
5. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 4, wherein the offset generation means comprises a microprocessor, the microprocessor being arranged to store the standard distance HA, standard speed V o , standard reproduction bit rate R o and standard signal processing time, and to calculate a deviation between the standard signal processing time and actual inter-head travelling time required for the recording medium to travel from the advanced reproduction head means to the recording head means, the offset signal being adapted to represent the number of the symbol clock pulses corresponding to the deviation.
6. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 5, wherein the compensation read-out sequence generation means comprises a second counter, the second counter being arranged to count the symbol clock pulses and generate a compensated symbol pointer indicating an actual sequence required in reading out for every unit of symbol the digital information stored in the shift register.
7. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 6, wherein the phase difference generation means comprises a comparator; the phase difference signal is an offset pulse released from the comparator; and the offset pulse resets the second counter so that a difference between the sequence indicated by the reference symbol pointer and that indicated by the compensated symbol pointer may coincide with the number of symbol clock pulses indicated by the offset signal.
8. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 5, further comprising: drive means for permitting the recording medium to travel and generating a pulse signal corresponding to a travel speed of the recording medium; servo control means for generating a medium speed controlling voltage and controlling the travel speed of the recording medium by using the medium speed controlling voltage so that the medium information is reproduced at the standard reproduction bit rate R o per track through the advanced reproduction head means; and inter-head distance setting means for entering to the microprocessor an actual inter-head distance between the advanced reproduction head means and the recording head means, the microprocessor being adapted to calculate actual inter-head travelling time based on the actual inter-head distance and the medium speed deviation derived from the pulse signal.
9. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 2, wherein the address generation circuit comprises an interleaving circuit for specifying an address in the memory means, which is required in interleaving processing and deinterleaving processing.
10. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 9, wherein the interleaving circuit comprises a ROM provided with a table for converting the compensation sequencing signal into an address in the memory means.
11. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 1, further comprising: switching means for switching between one case where the medium information reproduced from the recording medium through the advanced reproduction head means is re-recorded in the recording medium and another case where a part of the medium information is rewritten by recording on the recording medium external audio data supplied from an external device, through the recording head means.
12. A method for rewriting a part of digital medium information already recorded on a recording medium in a recording position compensation circuit of a digital information recording-reproduction apparatus, comprising the steps of: calculating through offset generation means a deviation between standard signal processing time, which is required for a process wherein digital medium information already recorded on recording medium is reproduced through advanced reproduction head means and re-recorded on the recording medium through recording head means, and inter-head travelling time which is required for the recording medium to travel a distance from the advanced reproduction head means to the recording head means; generating a reference sequencing signal through reference read-out sequence generation means such that the reference sequencing signal successively specifies an address in memory means according to a reference clock when digital information successively read out from the memory means is recorded on the recording medium through the recording head means under a condition that the deviation is 0; and generating a compensation sequencing signal through compensation read-out sequence generation means so that the compensation sequencing signal has a phase difference corresponding to the deviation with respect to the reference sequencing signal, whereby if the inter-head travelling time is longer than the standard signal processing time, compensation is performed so that a phase of the compensation sequencing signal may proceed slower than that of the reference sequencing signal, and if the inter-head travelling time is shorter than the standard signal processing time, compensation is performed so that the phase of the compensation sequencing signal may proceed faster than that of the reference sequencing signal.
13. The method as set forth in claim 12, further comprising the steps of: reading out the medium information through the advanced reproduction head means; producing a reproduction information symbol through the reproduction circuit means according to the read-out medium information; successively storing the reproduction information symbol in an address of the memory means specified by address generation means; producing reproduction information data by applying error-correcting processing, deinterleaving processing and interpolation processing to the reproduction information symbol stored in the memory means, and then successively storing the reproduction information data in an address of the memory means specified by the address generation means through switching means; and producing recording data by applying interleaving processing and error-correcting code adding processing to the reproduction information data read out from an address of the memory means in accordance with the compensation sequencing signal and further adding a predetermined redundant section thereto, and then re-recording the recording data on the recording medium through the recording head means.
14. The method as set forth in claim 13, further comprising the step of: converting the reproduction information data into an analog signal so as to release it as sound.
15. The method as set forth in claim 13, further comprising the steps of: switching the switching means to an external sound input terminal at a punch-in point where rewriting of a part of the medium information is to be started; successively storing the external audio data in an address of the memory means specified by the address generation means through the external sound input terminal, a D/A converter and the switching means; producing recording data by applying interleaving processing and error-correcting code adding processing to the external audio data read out from an address of the memory means in accordance with the compensation sequencing signal and further adding a predetermined redundant section thereto, and then recording the recording data on the recording medium through the recording head means, thereby rewriting the part of the medium information; and switching the switching means to the reproduction circuit means at a punch-out point where the rewriting of the part of the medium information is to be completed.
16. The recording position compensation circuit for use in the digital information recording-reproduction apparatus as set forth in claim 4, wherein the offset generation means comprises a microprocessor, the microprocessor being arranged to calculate actual signal processing time through actual reproduction bit rate R o , and the number of the stages D of the shift register, and to calculate a deviation between the signal processing time and actual inter-head travelling time required for the recording medium to travel from the advanced reproduction head means to the recording head means, the offset signal being adapted to represent the number of the symbol clock pulses corresponding to the deviation.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.