Booster circuit

Abstract

A booster circuit comprises a p-MOS transistor, two n-MOS transistors and a bootstrap capacitor. In the booster circuit, an output signal is charged up to a potential of a power supply through the n-MOS transistors, then is pushed up to a potential higher than that of the power supply by a bootstrap capacitor through the p-MOS transistors. In such a structure, the p-MOS transistor operates as a switching element when pushing up the output signal, so that operation speed is much higher than a conventional booster circuit in which n-MOS transistors are used as switching elements.

What is claimed is: 
     
       1. A booster circuit, comprising: means for generating a first control signal, the first control signal selectively having first and second levels, the first level being higher by a predetermined value than a potential of a power supply and the second level being a level not exceeding the potential of said power supply;   a first n-MOS transistor which is connected at a gate to an output terminal of said generating means by which the gate is supplied with the first control signal, at one channel terminal to a power supply, and at the other channel terminal to a first connecting point;   a p-MOS transistor which is connected at a gate to an input terminal which is supplied with an input signal, at one channel terminal to the first connecting point, and at the other channel terminal to an output terminal by which an output signal of said booster circuit is supplied to an external circuit;   a second n-MOS transistor which is connected at a gate to the input terminal, at one channel terminal to the output terminal, and at the other channel terminal to ground; and   a capacitor which is connected at one terminal to the first connecting point and at the other terminal to a control terminal by which said capacitor is supplied with a second control signal;   wherein said p-MOS transistor is formed on a surface of an n-type well region in which no other p-MOS transistor is formed, a potential of the n-type well being controlled to have the same level as that of the first connecting point; and   said generating means being controlled to generate the first signal of the first level in a normal state, and of the second level in a predetermined period including at least a duration during which the second control signal is high.   
     
     
       2. A booster circuit, according to claim 1, wherein: the first level of the first control signal is higher by a threshold voltage of said p-MOS transistor than a potential of the power supply sand the second level is equal to the potential of the power supply.   
     
     
       3. A booster circuit for use with a power supply, comprising: means for generating a first control signal, the first control signal having first and second levels where the first level is higher by a predetermined value than a potential of a power supply, and the second level is does not exceed the potential of the power supply;   a first n-MOS transistor connected at a gate to an output terminal of said generating means, at one channel terminal to a power supply, and at the other channel terminal to a first connecting point;   a p-MOS transistor connected at a gate to an input terminal which is supplied with an input signal, at one channel terminal to the first connecting point, and at the other channel terminal to an output terminal by which an output signal is supplied to an external circuit;   a second n-MOS transistor connected at a gate to the input terminal, at one channel terminal to the output terminal, and at the other channel terminal to ground; and   a capacitor connected at one terminal to the first connecting point and at the other terminal to a control terminal which supplies said capacitor with a second control.