Method for making a shallow junction bipolar transistor and transistor formed thereby

Abstract

Disclosed is a process for forming a bipolar transistor at the face (22) of a semiconductor layer. A refractory metal layer (34) is deposited on the face (22) to cover a base area (38) thereof. A dopant (40) is implanted through the metal layer (34) within the base area (38) to penetrate the face (22). The metal layer (34) is then removed from the face within an emitter area (48) contained within the base area (38). A dopant is then diffused into the face within the emitter area (48). Finally, the dopants are annealed to form a shallow base region (66) that spaces an emitter region (64) from a collector region (12, 14). The process of the invention can form a high-concentration emitter/base junction only 400 Angstroms from the surface of the semiconductor layer.

What is claimed is: 
     
       1. In a process for forming a bipolar transistor at a face of a semiconductor layer of a first conductivity type, the method comprising the steps of: depositing a refractory metal layer on the face to cover at least a base area thereof;   implanting a dopant of a second conductivity type through the metal layer within the base area to penetrate the face;   removing the metal layer only from an emitter area of the face within the base area;   introducing dopant of the first conductivity type into the emitter area; and   annealing the dopants to form a shallow base region of the second conductivity type and an emitter region of the first conductivity type in the semiconductor layer that correspond to the respective base and emitter areas, the base region spacing the emitter region from a collector region in the semiconductor layer of the first conductivity type.   
     
     
       2. The process of claim 1, wherein said step of depositing the refractory metal layer comprises depositing metal selected from the group consisting of refractory metals that do not form a silicide below at least 700° C. 
     
     
       3. The process of claim 2, wherein said step of depositing the refractory metal layer comprises depositing metal selected from the group consisting of titanium, tungsten, molybdenum and alloys thereof. 
     
     
       4. The process of claim 1, wherein: the metal layer is deposited to a depth of 500-1000 Angstroms; and the dopant is implanted through the metal layer at a dose of about 10 16  ions/cm 2 .   
     
     
       5. The process of claim 4, wherein: said refractory metal is a titanium layer on the face to a depth of approximately 1000 Angstroms; and   boron is implanted through the titanium layer at an implantation energy within the range of about 20 KeV to about 30 KeV.   
     
     
       6. The process of claim 1, wherein said steps of diffusing and annealing comprise the further steps of: forming a layer of material doped by the dopant of the first conductivity type such that the material contacts the face within the emitter area; and   flash-annealing the base area and the emitter area to form the shallow base region and the emitter region.   
     
     
       7. The process of claim 6, and further comprising the step of depositing a polycrystalline layer comprising silicon to contact the face within the emitter area before said step of annealing. 
     
     
       8. The process of claim 6, and further comprising the steps of: after said step of implanting the dopant, depositing a conductive layer comprising polycrystalline material on the metal layer across the base area;   before said step of removing the metal layer, removing the conductive layer from the emitter area to create an emitter orifice in the conductive layer;   after said step of removing the metal layer, conformally depositing a dielectric layer over the conductive layer and in the emitter orifice;   anisotropically back-etching the dielectric layer until only dielectric sidewalls within the emitter orifice remain, said sidewalls extending from the face of the semiconductor layer outwardly to insulate the interior of the orifice from the conductive layer;   depositing a doped layer comprising silicon in the emitter orifice; and   annealing the doped layer to diffuse dopant into the emitter region.   
     
     
       9. The process of claim 8, wherein: said conductive layer is deposited over a resistor area of the semiconductor layer to form a resistor.   
     
     
       10. The process of claim 9, wherein the refractory metal layer is deposited on a resistor area of the semiconductor layer spaced from the base area; and the conductive layer is deposited on the metal layer over the resistor area to form a low-sheet-resistance resistor.   
     
     
       11. The process of claim 9, wherein the metal layer is removed from over the resistor area such that a high-sheet-resistance resistor will be formed from the conductive layer. 
     
     
       12. The process of claim 6, and further comprising the steps of: after said step of removing the metal layer, depositing an amorphous layer comprising silicon on the emitter area;   doping the amorphous layer; and   annealing the doped amorphous layer to diffuse dopant into the emitter region.   
     
     
       13. The process of claim 1, wherein said step of annealing the dopants is performed such that an emitter/base junction of the transistor is about 500 Angstroms from the face, and such that a base/collector junction of the transistor is approximately 1000 Angstroms from the face. 
     
     
       14. The process of claim 1, wherein the metal layer that remains over the base area forms an extrinsic base.