System for addressing multiple addressable units by inactivating previous units and automatically change the impedance of the connecting cable

Abstract

An addressing device has an address generator (43), data wire (1), combined address and a supply wire (2) and ground wire (3) that form a cable (1,2,3). This cable (1,2,3) connects to multiple addressable units (14), containing switching means (13), that are connected to the data wire (1). Every addressable unit (14) comprises an address detector (12), which controls the switching means (8,13). The address generator (43) will issue a standardized signal, that will change a parameter by the influence of an impedance member (7) together with the cable length, so that after the commutation of the first switching means (8) and the information transfer via a second switching means (13), the same standardized signal can be used to select the addressable unit of the next cell.

I claim: 
     
       1. An arrangement for addressing addressable units comprising: cable means comprising a ground wire means, an address wire means, a data wire means, and a supply wire means;   multiple serially connected addressable unit, each addressable unit comprising an address detector,   a switching means connected to said cable means; and   a first impedance member which is situated between the address wire means and the ground wire means;     an address generator for sending a standardized signal to said addressable units through said cable means;   said standardized signal comprising a signal parameter that can be recognized and interpreted by said addressable units;   wherein the addressable unit is activated for a predetermined time interval for information transmission when the signal parameter is recognized by the addressable unit;   wherein before and during the activation of the addressable unit, the first impedance member are connected to the address wire means and the ground wire means by said switching means;   wherein after the addressable unit becomes inactive after the predetermined time interval the first impedance member is disconnected to the address wire means by said switching means;   wherein the total impedance of the cable means between the address generator and the next serially connected addressable unit following the inactivated addressable unit is increased to a total impedance sufficient to transmit the signal parameter to the next addressable unit;   said cable means further comprises another first impedance parts between the address wire means and the ground wire means between two succeeding addressable units; wherein   said another first impedance parts cause the total impedance of the cable means after the activated addressable unit to be independent of the number of succeeding not yet activated addressable units; and   wherein the total impedance of the remaining cable means and the addressable units yet to be activated will be sufficient for the standardized signal to be sufficiently attenuated in the address wire means between the next addressable unit to be activated and the addressable unit following said next addressable unit; whereby both the next addressable unit to be activated and the addressable unit following said next addressable unit are not activated and prevents the detection of the standardized signal by the addressable unit following said next addressable unit.   
     
     
       2. The arrangement as set forth in claim 1, wherein said switching means has a first switching means to connect and separate the first impedance member with the address wire, and a second switching means to connect and separate a signal means with the data wire. 
     
     
       3. The arrangement as set forth in claim 2, wherein said first switching means is opened and said second switching means is closed following recognition of the signal parameter by the addressable unit; and wherein said second switching means is opened again after a delay which provides for information transmission.   
     
     
       4. The arrangement as set forth in claim 3, wherein said delay is produced by a delay generator comprising said first impedance member. 
     
     
       5. The arrangement as set forth in claim 4, wherein said first switching means has a controlling input and wherein said delay generator is connected to provoke a delayed opening of said second switch means after recognition of the parameter of the standardized signal by the addressing unit. 
     
     
       6. The arrangement as set forth in claim 1, wherein a second impedance member is connected in series with the address wire means. 
     
     
       7. The arrangement as set forth in claim 2, wherein said addressable units further comprise a reset circuit to bring said addressable unit to a normal state; wherein said first switching means is closed and said second switching means is open. 
     
     
       8. The arrangement as set forth in claim 1, wherein said addressing generator sends a standardized signal with increasing values of an electric property to the address detectors; and wherein the address detectors interpret the recognition of the parameter of the received signal that is destined for the addressable units.   
     
     
       9. The arrangement as set forth in claim 1, wherein said address detector comprises an output, and a strobe signal that changes state when the address detector recognizes the standardized signal. 
     
     
       10. The arrangement as set forth in claim 1, wherein said addressable unit comprises a sensor means for converting measurable physical information into a measured signal by transmission through the data wire means; and a current source means controlled by said sensor to produce a current signal proportional to the measured signal. 
     
     
       11. The arrangement as set forth in claim 1, wherein said addressable unit comprises an information output means. 
     
     
       12. The arrangement as set forth in claim 1, wherein a cable terminal processor means controls a connection of an address wire of a second device based upon the information signal from the addressable units. 
     
     
       13. The arrangement as set forth in claim 1, wherein said switching means further comprises: a first switching means between an address signal input and the first impedance member; wherein said first switching means is closed by a reset signal; a second switching means between an information means and a signaling means;   wherein an initial state of the first switching means is closed and the initial state of the second switching means is open; and     said address detector opens the first switching means and closes the second switching means for a certain duration after recognition of an addressing signal.   
     
     
       14. The arrangement of claim 13 wherein said information means is an information source; and said signaling means is a signal input means. 
     
     
       15. The arrangement of claim 13 wherein said information means is an information sink; and said signaling means is a signal output means. 
     
     
       16. The arrangement as set forth in claim 1, wherein the time interval wherein the addressable unit is activated is determined by the transmitting time of the standardized signal after recognition of the parameter. 
     
     
       17. The arrangement as set forth in claim 1, wherein the time interval wherein the addressable unit is activated is determined by the standardized signal charging a capacitor which will thereafter discharge through a resistor. 
     
     
       18. The arrangement as set forth in claim 1, said cable means comprising: a wire means surrounded by an insulation means;   a clips-fastening means for fixing said addressable units form the outside to the cable by mechanical penetration of the insulation means of said cable;   wherein electrical contact is established between the addressable unit and the wire means.   
     
     
       19. A computer implemented method for addressing multiple addressable units connected by a cable in series with an address generator in an addressing device comprising the following steps: bringing multiple addressable units, comprising a switching means and first impedance member, to a state wherein said addressable units are connected to said cable, and said addressable units are hindered from transmitting information by a reset signal;   producing a series of address signals by address generators;   sending said address signals through said cable;   activating the first addressable unit with a first address signal during a certain duration for transmitting information, wherein before and during the activation of the first addressable unit, the first impedance member is connected to the cable by said switching means;   transmitting information;   terminating transmission of information; and inactivating said first addressable unit by disconnecting the first impedance members to the cable by said switching means;   increasing the total impedance, of the cable between the address generator and the addressable unit following the inactivated addressable unit, sufficiently to allow a new address signal to be only detectable in the following addressable unit; and   bringing, after recognition of the address signal, the next following addressable unit, to a state for time-limited information transmission;   transmitting information;   terminating transmission of information; and inactivating the addressable unit; and   recognizing a parameter in the following address signal by the incremented impedance at the addressable unit.   
     
     
       20. The method as set forth in claim 19, wherein further comprising the steps of: increasing the total impedance of the cable between the address generator and the addressable unit following the inactivated addressable unit, by opening the switching means connecting the cable to the first impedance member.