Image processing system
Abstract
An image processing system includes data compressor for compressing image data, storing output data of the data compressor, data decompressor for decompressing the compressed data into the original image data and transferring the original image data to an image output section, and controlling the compressor data storage and decompressor whereby the image processing system compresses image data as fed from the image read device, stores the image data, reads the stored image data, decompresses the read out image data, and sends the decompressed image data to an image output section. The image processing system is improved in that at least one of output data bus line from the image read device or an output data bus line to the image output section has a bit-width larger than the number of bits constituting one pixel, and at least one pixel data is transferred every one clock cycle.
Claims
exact text as granted — not AI-modifiedI claim:
1. An image processing system for processing original image data comprising: image reading means for reading an original image and for outputting original image data, said image reading means including an output bus with a bit width larger than the number of bits constituting one pixel, said output bus transferring a plurality of bits corresponding to at least one pixel during each clock cycle, a control line for transferring attributes of the data, and wherein line synchronization data and page synchronization data are not contained in the data transferred over the output bus; data compressing means for compressing image data; data storage means for storing output data of said data compressing means; data decompressing means for decompressing the compressed data into decompressed data corresponding to the original image data and for transferring said decompressed data to an image output section; image output means coupled to the image output section for outputting an image corresponding to the original image data; and control means for controlling said image read means, data compressing means, data storage means, and data decompressing means.
2. The image processing system according to claim 1, wherein said pixel includes color information.
3. The image processing system according to claim 1, wherein the number of bits transferred during one clock cycle over said output bus is 16 bits.
4. The image processing system according to claim 1, wherein the number of bits transferred during one clock cycle over said output bus is 32 bits.
5. The image processing system according to claim 1, wherein the number of bits transferred during one clock cycle over said output bus is 64 bits.
6. The image processing system according to claim 1, wherein said original image data is converted into data packages each having a data width equal to the data width of said output bus, and wherein said data packages are serially transferred by said output bus.
7. The image processing system of claim 6 wherein the serially transferred data packages are transmitted to the image output section over a serial communication line.
8. The image processing system according to claim 1, wherein said original image data is converted into data packages each having a data width equal to the data width of said output bus, and wherein said data packages are serially transferred by said output bus.
9. The image processing system of claim 8 wherein the serially transferred data packages are transmitted to the image output section over a serial communication line.
10. An image processing system for processing original image data comprising: image reading means for reading an original image and for outputting during each clock cycle a plurality of bits greater than a number of bits constituting one pixel; data compressing means for compressing image data; data storage means for storing output data of said data compressing means; data decompressing means for decompressing the compressed data into decompressed data corresponding to the original image data and for transferring said decompressed data to an output bus with a bit width larger than the number of bits constituting one pixel, said output bus transferring at least one pixel during each clock cycle; a control line for transferring attributes of the data, and wherein line synchronization data and page synchronization data are not contained in the data transferred over the output bus; image output means for outputting an image corresponding to the original image data; and control means for controlling said image read means, data compressing means, data storage means, and data decompressing means.
11. The image processing system according to claim 10, wherein said pixel includes color information.
12. The image processing system according to claim 10, wherein the number of bits transferred during one clock cycle over said output bus is 16 bits.
13. The image processing system according to claim 10, wherein the number of bits transferred during one clock cycle over said output bus is 32 bits.
14. The image processing system according to claim 10, wherein the number of bits transferred during one clock cycle over said output bus is 64 bits.
15. The image processing system according to claim 10, wherein said original image data is converted into data packages each having a data width equal to the data width of said output bus, and wherein said data packages are serially transferred by said output bus.
16. The image processing system according to claim 10, wherein said original image data is converted into data packages each having a data width equal to the data width of said output bus, and wherein said data packages are serially transferred by said output bus.
17. The image processing system of claim 16 wherein the serially transferred data packages are transmitted to the image output section over a serial communication line.
18. An image processing system for processing original image data comprising: image reading means for reading an original image and for outputting original image data, said image reading means including a bit width converter for sequentially packing pixel data into a parallel word; a first output bus coupled to said converter for serially outputting during each clock cycle a plurality of bits corresponding to at least one pixel, said first output bus having a bit width larger than the number of bits constituting one pixel; data compressing means for compressing image data; data storage means for storing output data of said data compressing means; data decompressing means for decompressing the compressed data into decompressed data corresponding to the original image data and for transferring said decompressed data to an image output section via a second output bus with a bit width larger than the number of bits constituting a pixel, said output bus transferring at least one pixel during each clock cycle; image output means coupled to said output bus for outputting an image corresponding to the original image data; and control means for controlling said image read means, data compressing means, data storage means, and data decompressing means.Cited by (0)
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