P
US5250445AExpiredUtilityPatentIndex 92

Discretionary gettering of semiconductor circuits

Assignee: TEXAS INSTRUMENTS INCPriority: Dec 20, 1988Filed: Jan 17, 1992Granted: Oct 5, 1993
Est. expiryDec 20, 2008(expired)· nominal 20-yr term from priority
Inventors:BEAN KENNETH EMALHI SATWINDER SRUNYAN WALTER R
H10P 36/03
92
PatentIndex Score
71
Cited by
28
References
18
Claims

Abstract

A semiconductor wafer (32) is patterned to have gettering areas (36-38) selectively positioned proximate devices (44-46) which require gettering. The areas (36-38) comprise germanium-doped silicon having a germanium concentration of approximately 1.5%-2.0%. The germanium creates a lattice mismatch between the substrate (32) and an epitaxial layer (34) which is sufficient to produce defects capable of gettering contaminants. The gettering areas (36-38) may be formed by selective deposition, selective etching, ion-implantation or selective diffusion techniques.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for forming an integrated circuit having a multiplicity of devices, comprising the steps of: providing a silicon substrate;   introducing germanium atoms into selected areas of a surface of said substrate to form gettering areas, wherein said gettering areas have a molar concentration of between about 1.5% and 2.0% of germanium to germanium-doped silicon;   forming a crystalline semiconductor layer on said surface of said silicon substrate such that a lattice mismatch strain field exists between said gettering areas of said substrate and said crystalline layer; and   forming at least some of said multiplicity of devices in said crystalline layer, selected ones of said at least some devices disposed proximate said gettering areas having a lattice mismatch and at a surface of said crystalline layer spaced from said gettering areas such that contaminants migrate to said gettering areas and forming at least some others of said multiplicity of devices in said crystalline layer, said some others of said multiplicity of devices disposed such that contaminants are not substantially gettered from said some others of said multiplicity of devices.   
     
     
       2. A method as in claim 11 wherein said introducing of germanium atoms is performed by ion implantation. 
     
     
       3. A method as in claim 2 wherein said ion implantation is performed through a mask to provide selected areas where said germanium is introduced into said substrate. 
     
     
       4. The method of claim 1, wherein the step of forming said gettering areas comprises: depositing a germanium-doped silicon film over the wafer; and   selectively etching said film to form gettered areas with said film and ungettered areas without said film.   
     
     
       5. The method of claim 1, wherein the step of forming said gettering areas comprises selectively diffusing germanium into the wafer. 
     
     
       6. A method for forming an integrated circuit in a silicon layer formed on a silicon substrate, said integrated circuit having at least one device of a multiplicity of devices formed proximate a gettering area formed in said substrate, said method comprising the steps of: providing a silicon substrate;   introducing germanium atoms to form at least one gettering area within said substrate at a selected location, wherein said gettering area has a molar concentration of between about 1.5% and 2.0% of germanium to germanium-doped silicon; and   forming said at least one device in said silicon layer and selectively spaced from said selected location such that said gettering area attracts contaminants away from said at least one device and forming at least one other device in said silicon layer and selectively spaced form said selected location such that said gettering area does not substantially attract contaminants away from said at least one other device.   
     
     
       7. A method as in claim 6 wherein said introducing of germanium atoms is performed by ion implantation. 
     
     
       8. A method as in claim 7 wherein said ion implantation is performed through a mask to provide selected areas where said germanium is introduced into said substrate. 
     
     
       9. The method of claim 6, wherein said gettering area is formed by depositing a germanium-doped silicon film over the wafer. 
     
     
       10. The method of claim 9, wherein the step of depositing further comprises selectively depositing said film. 
     
     
       11. The method of claim 10, wherein the step of selectively depositing comprises; patterning photoresist on the wafer;   forming recesses within the wafer corresponding to said pattern;   depositing said filming said recesses; and   stripping said photoresist.   
     
     
       12. The method of claim 9, further comprising the step of selectively etching said film. 
     
     
       13. The method of claim 12, wherein the step of selectively etching comprises: masking said film with a photoresist pattern; and   etching said film to form gettered and ungettered areas.   
     
     
       14. The method of claim 13, further comprising the step of replanarizing the wafer with a boron/phosphorus/glass application. 
     
     
       15. The method of claim 6, wherein the step of forming said at least one gettering area comprises selectively diffusing germanium into the wafer. 
     
     
       16. The method of claim 6, wherein the step of forming gettering areas comprises: masking the substrate to form gettered areas and ungettered areas;   etching the substrate to form recesses therein in said gettered areas;   depositing a germanium-doped silicon film in said recesses in said gettered areas; and   stripping said mask from said ungettered areas.   
     
     
       17. The method of claim 16, wherein the step of masking comprises forming an oxide over said ungettered areas. 
     
     
       18. The method of claim 16, wherein the step of depositing comprises depositing a 1.5%-2.0% germanium-doped silicon film.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.