US5260229AExpiredUtility

Method of forming isolated regions of oxide

86
Assignee: SGS THOMSON MICROELECTRONICSPriority: Aug 30, 1991Filed: Aug 30, 1991Granted: Nov 9, 1993
Est. expiryAug 30, 2011(expired)· nominal 20-yr term from priority
H10P 14/61H10W 10/13H10W 10/012
86
PatentIndex Score
86
Cited by
5
References
13
Claims

Abstract

A method is provided for forming isolated regions of oxide of an integrated circuit, and an integrated circuit formed according to the same. A pad oxide layer is formed over a portion of a substrate. A first silicon nitride layer is formed over the pad oxide layer. A polysilicon buffer layer is then formed over the first silicon nitride layer. A second silicon nitride layer is formed over the polysilicon layer. A photoresist layer is formed and patterned over the second silicon nitride layer. An opening is etched through the second silicon nitride layer and the polysilicon buffer layer to expose a portion of the first silicon nitride layer. A third silicon nitride region is then formed on at least the polysilicon buffer layer exposed in the opening. The first silicon nitride layer is etched in the opening. A field oxide region is then formed in the opening.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of forming isolated regions of oxide on an integrated circuit, comprising the steps of: forming a pad oxide layer over a portion of a substrate;   forming a first silicon nitride layer over the pad oxide layer, wherein the first silicon nitride layer has a first thickness thin enough to prevent stress to the substrate;   forming a polysilicon buffer layer over the first silicon nitride layer;   forming a second silicon nitride layer over the polysilicon buffer layer, wherein the second silicon nitride layer has a second thickness substantially thicker than the first thickness;   forming and patterning a photoresist layer over the second silicon nitride layer;   etching an opening through the second silicon nitride layer and polysilicon buffer layer to expose a portion of the first silicon nitride layer;   forming a third silicon nitride region on at least the polysilicon buffer layer exposed in the opening; and,   forming a field oxide region in the opening.   
     
     
       2. The method of claim 1, wherein the thickness of the pad oxide layer is between approximately 10 to 300 angstroms. 
     
     
       3. The method of claim 1, wherein the first silicon nitride layer has a thickness of between approximately 10 to 200 angstroms. 
     
     
       4. The method of claim 3, wherein the first silicon nitride layer is formed by chemical vapor deposition. 
     
     
       5. The method of claim 3, wherein the first silicon nitride layer is formed by rapid thermal nitridation of an upper portion of the pad oxide layer. 
     
     
       6. The method of claim 1, wherein the polysilicon buffer layer is between approximately 50 to 1000 angstroms. 
     
     
       7. The method of claim 1, wherein the thickness of the second silicon nitride layer is between approximately 500 to 3000 angstroms. 
     
     
       8. The method of claim 1, wherein the second silicon nitride layer is formed by chemical vapor deposition. 
     
     
       9. The method of claim 1, wherein the third silicon nitride region is formed by depositing between approximately 30 to 100 angstroms of silicon nitride over the second silicon nitride layer and in the opening. 
     
     
       10. The method of claim 1, wherein the third silicon nitride region is formed by rapid thermal nitridation of the polysilicon buffer layer exposed in the opening. 
     
     
       11. The method of claim 1, further comprising the step of: etching the first silicon nitride layer during the etching the opening step exposing the pad oxide layer in the opening, and wherein the third silicon nitride region is formed by rapid thermal nitridation of the polysilicon buffer layer and the pad oxide layer exposed in the opening.   
     
     
       12. The method of claim 1, further comprising the step of: etching the first silicon nitride layer and the pad oxide layer during the etching the opening step exposing the substrate in the opening, and wherein the third silicon nitride region is formed by rapid thermal nitridation of the polysilicon buffer layer and the substrate exposed in the opening.   
     
     
       13. The method of claim 1, wherein the thickness of the field oxide region is between approximately 2000 to 8000 angstroms.

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