Method for specifying operating characteristics of integrated circuits

Abstract

A method for specifying characteristics of an integrated circuit wherein complementary output signals of the integrated circuit are required to cross or equal one another within a signal transition box during transitions of the complementary output signals. The signal transition box is defined by a maximum output signal level as a high side, a minimum output signal level as a low side, a minimum delay time as a leading side and a maximum delay time as a trailing side. A maximum allowable slew rate preferably is also defined.

What is claimed is: 
     
       1. A method for specifying characteristics of an integrated circuit having at least first and second output signals which transition between a logical one state and a logical zero state, at least one of said at least first and second output signals being a complement of at least another one of said at least first and second output signals, said method comprising the steps of: defining a maximum signal level as a high side of a signal transition box;   defining a minimum signal level as a low side of said signal transition box;   defining a minimum delay time for transition of an output signal from said minimum signal level to said maximum signal level and from said maximum signal level to said minimum signal level, said minimum delay time defining a leading side of said signal transition box;   defining a maximum delay time for transition of an output signal from said minimum signal level to said maximum signal level and from said maximum signal level to said minimum signal level, said maximum delay time defining a trailing side of said signal transition box; and   requiring complementary ones of said at least first and second output signals to cross one another within said signal transition box during transitions of said complementary ones of said at least first and second signals.   
     
     
       2. A method for specifying characteristics of an integrated circuit as claimed in claim 1 further comprising the step of defining a maximum allowable slew rate for said at least first and second signals during transitions of said complementary ones of said at least first and second signals. 
     
     
       3. A method for specifying characteristics of an integrated circuit, said integrated circuit having first and second output terminals and first and second input terminals, said first and second output terminals having complementary output signals thereon and said first and second input terminals having complementary input signals thereon, said output signals on said first and second output terminals being capable of transitions between a maximum output voltage and a minimum output voltage in response to a transition of said input signals on said first and second input terminals, said method comprising the steps of: determining a maximum signal crossing voltage as a percentage of said maximum output voltage of said output signals, said maximum signal crossing voltage defining a high side of a signal transition box;   determining a minimum signal crossing voltage as a percentage of said maximum output voltage of said output signals, said minimum signal crossing voltage defining a low side of said signal transition box;   defining a minimum signal crossing delay time subsequent to transitions of said input signals, said minimum signal crossing delay time defining a leading side of said signal transition box;   defining a maximum signal crossing delay time subsequent to transitions of said input signals, said maximum signal crossing delay time defining a trailing side of said signal transition box; and   requiring said output signals to equal one another within said signal transition box as said output signals transition from said maximum output voltage to said minimum output voltage and from said minimum output voltage to said maximum output voltage.   
     
     
       4. A method for specifying characteristics of an integrated circuit as claimed in claim 3 further comprising the step of defining a maximum allowable slew rate for said output signals during transitions of said output signals. 
     
     
       5. A method for specifying characteristics of a transmitter driver having first and second input terminals and first and second output terminals, input signals on said first and second input terminals being complements of one another and output signals on said first and second output terminals being complements of one another, said first and second output signals being capable of transitions between a maximum output voltage and a minimum output voltage in response to transitions of said first and second input signals, said method comprising the steps of: determining a maximum signal crossing voltage equal to sixty five percent of said maximum output voltage, said maximum signal crossing voltage defining a high side of a signal transition box;   determining a minimum signal crossing voltage equal to thirty five percent of said maximum output voltage, said minimum signal crossing voltage defining a low side of said signal transition box;   defining a minimum signal crossing delay time subsequent to transitions of said input signals, said minimum signal crossing delay time being equal to one hundred and eighty (180) nanoseconds and defining a leading side of said signal transition box;   defining a maximum signal crossing delay time subsequent to transitions of said input signals, said maximum signal crossing delay time being equal to five hundred (500) nanoseconds and defining a trailing side of said signal transition box; and   requiring said output signals to cross one another within said signal transition box during transitions of said output signals.