Microprocessor-controlled regulator

Abstract

A regulator provides a control signal for controlling a generator which is providing an electrical output. The electrical output includes an output voltage and an output current applied to a load. The regulator comprises a microprocessor, voltage sensing inputs and current sensing inputs which cooperate with the microprocessor to sense a parameter of the electrical output applied to the load and a first memory for storing predetermined parameters. The microprocessor compares the sensed parameter to its corresponding predetermined parameter stored in the first memory and generates an output signal representative of the comparison. The regulator further comprises a second memory for storing instructions for controlling operation of the microprocessor and generates the control signal as a function of the output signal from the microprocessor.

What is claimed is: 
     
       1. A regulator providing a control signal for controlling a generator providing an electrical output including an output voltage and an output current applied to a load, said regulator comprising: means for sensing a parameter of the electrical output applied to the load;   a first memory for storing at least one predetermined parameter corresponding to the sensed parameter;   a microprocessor for comparing the sensed parameter to the corresponding predetermined parameter stored in said first memory, said microprocessor generating an output signal representative of the comparison;   a second memory for storing instructions for controlling operation of said microprocessor; and   means for generating the control signal as a function of the output signal from said microprocessor.   
     
     
       2. A regulator as set forth in claim 1 wherein an output winding is connected to the load, and wherein the generator has an exciter winding and a field winding generating a rotating field inducing the electrical output in the output winding connected to the load, said regulator further comprising means for energizing the field winding in response to the microprocessor output signal whereby excitation of the generator varies as the rotating field is influenced by a magnetic field produced by the field winding. 
     
     
       3. A regulator as set forth in claim 2 wherein the control signal controls energizing of the field winding for adjusting the rotating field as a function of the control signal thereby adjusting the electrical output as a function of the output signal from said microprocessor. 
     
     
       4. A regulator as set forth in claim 2 wherein said first memory includes a minimum duty cycle level corresponding to a minimum excitation level and a maximum duty cycle level corresponding to a maximum excitation level and further comprising means for limiting a duty cycle of the control signal between the minimum and maximum excitation levels stored in said first memory thereby preventing overheating or synchronism loss to the generator due to fluctuations in the load. 
     
     
       5. A regulator as set forth in claim 1 wherein said sensing means includes means for detecting a phase component and a magnitude component of the output current and a phase component of the output voltage, and wherein said microprocessor includes means for determining a phase relationship defined by an angular difference between the detected phase component of the output current and the detected phase component of the output voltage wherein the output current magnitude and the phase relationship represent a reactive component of the output current. 
     
     
       6. A regulator as set forth in claim 5 including voltage regulation means for controlling a magnitude of the output voltage applied to the load, PF means for controlling a power factor of the output current and the output voltage applied to the load, VAR means for controlling a volt-ampere-reactive component of the output current and the output voltage applied to the load, and means for selectively activating the voltage regulation means, the PF means of the VAR means. 
     
     
       7. A regulator as set forth in claim 6 further comprising: volt-ampere-reactive control means for adjusting the control signal based on both the output current phase component and the output current magnitude component to maintain the reactive current at a preset value stored in said first memory.   
     
     
       8. A regulator as set forth in claim 6 further comprising: power factor control means for adjusting the control signal based on the phase relationship to maintain the angular difference at a preset level stored in said first memory.   
     
     
       9. A regulator as set forth in claim 5 further comprising voltage regulation means for controlling the control signal to maintain a magnitude of the output voltage applied to the load at or near a predefined set point and wherein said microprocessor includes means for modifying the predefined set point as a function of the reactive component of the current thereby controlling the reactive component of the current applied to the load. 
     
     
       10. A regulator as set forth in claim 5 wherein said sensing means includes: means for sensing one or more phases of the output voltage;   means for selecting predetermined parameters in response to phases sensed by the phase sensing means.   
     
     
       11. A regulator as set forth in claim 10 further comprising: an A voltage input;   a B voltage input;   a C voltage input;   means for detecting a voltage waveform between the A and B inputs;   means for detecting a voltage waveform between the B and C inputs;   means for determining a phase difference between the A-B waveform and the B-C waveform; and   means for selecting predetermined parameters based on the determined phase difference.   
     
     
       12. A regulator as set forth in claim 11 wherein the selecting means selects parameters corresponding to a single phase configuration when the phase difference is approximately 0°, wherein the selecting means selects parameters corresponding to an A-B-C phase configuration when the phase difference is such that the A-B waveform leads the B-C waveform by approximately 60°, and wherein the selecting means selects parameters corresponding to an A-C-B phase configuration when the phase difference is such that the A-B waveform lags the B-C waveform by approximately 60°. 
     
     
       13. A regulator as set forth in claim 1 wherein said microprocessor includes a run time meter including clock means for measuring time of service of the regulator. 
     
     
       14. A regulator as set forth in claim 1 further comprising: a first input for receiving a raise signal;   a second input for receiving a lower signal;   voltage regulation means for controlling the control signal to maintain a magnitude of the output voltage applied to the load at or near a predefined set point;   means for increasing the set point in response to a raise signal received by the first input; and   means for decreasing the set point in response to a lower signal received by the second input.   
     
     
       15. A regulator as set forth in claim 14 wherein the increase or decrease in the set point approximately equals one volt/second. 
     
     
       16. A regulator as set forth in claim 1 wherein said microprocessor includes means for evaluating the predetermined parameters stored in said first memory, the evaluation means including a data link for reading a desired memory location and for modifying said first memory for purposes of calibration, initialization or enabling. 
     
     
       17. A regulator as set forth in claim 16 wherein said evaluation means includes means for monitoring the electrical output of the generator. 
     
     
       18. A regulator as set forth in claim 1 further comprising means responsive to operator input for designating a predetermined set of parameters stored in said first memory representative of a stability range adapted for the type of generator to which said regulator is connected and means for initializing said regulator to the designated set of parameters whereby subsequent stability adjustments are minimized. 
     
     
       19. A regulator as set forth in claim 18 wherein said second memory includes the following discrete time control algorithm:   control=K * (a2 * X3-a1* X2+a0 * X1)     where:   X1=X2'   X2=X3'   X3=Xtarget-Xsensed+X3'; and where:     X1, X2 and X3 are variables stored in said first memory calculated in an iteration of the control algorithm and X1', X2' and X3 are X1, X2 and X3, respectively, of a previous iteration of the control algorithm;   Xtarget is a desired electrical output;   Xsensed is the sensed parameter;   a0, a1 and a2 comprise the predetermined set of parameters stored in said first memory representative of the stability range adapted for the type of generator;   K is a forward gain setting; and   Xcontrol is a duty cycle of a pulse-width modulated signal.   
     
     
       20. A regulator as set forth in claim 18 wherein said second memory includes the following discrete time control algorithm:   Xcontrol=X control'+Kp * Pc-Ki * Ic-Kd * Dc     where:   Xcontrol is the duty cycle of a pulse-width modulated signal for the iteration;   Xcontrol' is the Xcontrol from the previous iteration;   Pc is a proportional component of the comparison of Xtarget and Xsensed; Pc=Xtarget-Xsensed;   Ic is an integral component of the comparison of Xtarget and Xsensed; Ic=Ic'+(Xtarget-Xsensed); Ic'=Ic from the previous iteration;   Dc is a differential component of Xsensed; Dc=Xsensed=Xsensed'; Xsensed'=Xsensed from the previous iteration;   Kp is a gain for the proportional component of the voltage output;   Ki is a gain for the integral component of the voltage output;   Kd is a gain for the differential component of the voltage output; and   where:   Kp, Ki and Kd comprise the predetermined set of parameters stored in said first memory representative of the stability range adapted for the type of generator.   
     
     
       21. A regulator as set forth in claim 1 wherein said microprocessor includes means for shutting down the generator in response to overexcitation, loss of sensing, overvoltage or thermal shutdown to protect the generator from damaging operating conditions, and an event recorder for recording and displaying the shutdowns and causes thereof. 
     
     
       22. A regulator as set forth in claim 18 wherein said second memory includes the following discrete time control algorithm:   RV=FRSP+AI+UF-EU+D     where:   RV is a reference value or regulation target voltage;   FRSP is a flat regulation set point;   AI is an accessory input voltage adjustment;   UF is an under frequency compensation voltage adjustment;   EU is an engine unloading voltage adjustment;   D is a voltage adjustment for controlling droop; and where:     FRSP=6 * CVA+0.5 * FVA+RU-RD     where:     CVA is a course voltage adjustment from said first memory;   FVA is a fine voltage adjustment from said first memory;   RU is 1 volt/second of remote up static adjustment;   RD is 1 volt/second of remote down static adjustment; and where:     AI=(ACC-512) * Kacc     where:     ACC is an accessory analog to digital input value;   Kacc is an accessory gain from said first memory; and where:     UF=0 if a frequency f is greater than or equal to UFSP;   UF=(UFSP-f) * Kuf if the frequency f is less than UFSP where:     f is an observed frequency of the generator in hertz;   UFSP is an under frequency set point in hertz from said first memory;   Kuf is an under frequency gain from said first memory; and where:     EU=0 if the frequency f is greater than or equal to EUSP;   EU=0 if the frequency is less than EUSP and Df is not greater than EUCR;   EU=(EUSP-f) * Keu if the frequency f is less than EUSP and Df is greater than EUCR where:     f is the observed frequency of the generator in hertz;   EUSP is an engine unloading frequency set point in hertz from said first memory;   Keu is an engine unloading gain from said first memory;   Df is a change in observed frequency in hertz/second;   EUCR is a set point for change in observed frequency in hertz/second to start the engine unloading from said first memory; and where:     D=1 * RC * Kd if power factor is leading;   D=-1 * RC * Kd if the power factor is lagging where:     RC is a reactive current component observed in the output current; and   Kd is a droop gain from said first memory.