Driver circuit for long luminescence life display device and method of driving such device

Abstract

A driver circuit for a display device, in which first and second clock pulse generator circuits generate first and second clock pulses to a gate circuit for allowing the first clock pulse to pass when the first and second clock pulses are a high level, and by the output of the gate circuit, a combination of a transistor and an inductance generate a high voltage pulse. The high voltage pulse is rectified in a triple voltage rectifying circuit to output a high voltage output for driving the display device such as EL elements, and the high voltage output can be reset by a low frequency pulse output from a discharge circuit. As a result, no inverter is required, and a small-sized and light-weighted driver circuit is achieved with a long luminescence life of the EL elements and without noises offensive to the ear.

What is claimed is: 
     
       1. A driver circuit for applying a driving voltage to a display device, comprising: first clock generator means for generating a first clock pulse having a first frequency;   second clock generator means for generating a second clock pulse having a second frequency lower than said first frequency;   gate means for receiving said first and second clock pulses and outputting said first clock pulse when said second clock pulse is present;   high voltage pulse generation means for generating a high voltage pulse in synchronism with said first clock pulse output from said gate means;   voltage multiplication rectifying means for performing a voltage multiplication rectifying of said high voltage pulse to obtain a high voltage output; and   reset means for resetting said voltage multiplication rectifying means when said second clock pulse is off.   
     
     
       2. The driver circuit as claimed in claim 1, wherein said gate means is an AND gate, said AND gate outputting said first clock pulse when both said first and second clock pulses are at a high level. 
     
     
       3. The driver circuit as claimed in claim 1, wherein said high voltage pulse generation means includes a coil connected to a power source and a MOSFET connected to said coil, and said first clock pulse output from said gate means is input to said MOSFET. 
     
     
       4. The driver circuit as claimed in claim 1, wherein said voltage multiplication rectifying means is a triple voltage rectifying circuit. 
     
     
       5. The driver circuit as claimed in claim 1, wherein the reset means includes: first transistor means having a base and a collector for inputting second clock pulse at base from the second clock generator means; and   second transistor means having a base connected to collector of first transistor means and a power source via a resistor and a collector connected to an output terminal of the driver circuit.   
     
     
       6. A method of driving a display device, comprising the steps of: generating a first clock pulse having a first frequency;   generating a second clock pulse having a second frequency lower than said first frequency;   allowing said first clock pulse to pass responsive to said second clock pulse;   generating a high voltage pulse in synchronism with said passed first clock pulse;   performing a voltage multiplication rectifying of said high voltage pulse to obtain a high voltage output; and   resetting said voltage multiplication rectifying operation when said second clock pulse is off.