Offset-insensitive switched-capacitor gain stage

Abstract

An IC chip formed with an analog-to-digital converter having a switched-capacitor programmable gain stage and employing a switched-capacitor sigma-delta modulator. The chip includes pins to receive a number of different audio input signals which are selectively connectible to buffer amplifiers the outputs of which are directed to a switch to select one output for further processing. The selected buffer amplifier output is d-c coupled to an input signal terminal of a switched-capacitor programmable gain stage. The output of this gain stage is coupled to an output stage including an op-amp and associated switched-capacitor circuitry. The programmable gain stage has a reference input terminal which is connected through an IC chip pin to an external capacitor the other electrode of which is returned to signal common. This capacitor develops a d-c voltage corresponding to the offset voltages of the operative buffer amplifier and the op-amp, and including a component corresponding to charge-injection from MOS switches. Absorption of such d-c voltages by this capacitor prevents those voltages from being significantly gained by the amplifier circuitry, and thereby prevents those voltages from using up an excessive portion of the dynamic range of the circuitry.

What is claimed is: 
     
       1. An a-c gain circuit for use as part of signal-processing means to be incorporated in a system having a signal common and comprising: an IC chip including:   an input signal line;   a reference signal line;   switched-capacitor circuitry having an input signal circuit and an output signal circuit, said input signal circuit including two input terminals, one of said input terminals being connected to said input signal line and the other being connected to said reference signal line;   amplifier means coupled to one of said signal circuits to provide amplification of signals passing through said switched-capacitor circuitry; and   a capacitor fixedly connected through a non-switched connection between said reference signal line and signal common.   
     
     
       2. Apparatus as claimed in claim 1, including an input signal selection circuit having a plurality of input lines respectively connected to a set of first IC pins connectible to different input signal sources; said input signal line being arranged to be coupled to any of said set of first IC pins.   
     
     
       3. Apparatus as claimed in claim 2, wherein said amplifier means comprises at least one buffer amplifier having its input coupled to any of said set of first IC pins and supplying a signal to said input signal line. 
     
     
       4. Apparatus as claimed in claim 3, wherein said amplifier means comprises at least two buffer amplifiers of differing gains and with their inputs selectively connectible to said set of first IC pins; said amplifiers producing outputs selectably connectible to said input signal line.   
     
     
       5. Apparatus as claimed in claim 1, wherein said amplifier means comprises an amplifier forming part of an output stage which is coupled to said output signal circuit for said switched-capacitor circuitry. 
     
     
       6. Apparatus as claimed in claim 5, wherein said output stage is a balanced circuit having first and second input terminals and first and second clocked switches coupled to said output stage input terminals respectively. 
     
     
       7. Apparatus as claimed in claim 6, wherein said output stage clocked switches have input and output nodes, said amplifier having first and second input terminals coupled to output nodes of said output stage clocked switches respectively. 
     
     
       8. Apparatus as claimed in claim 5, wherein said output stage comprises switched-capacitor output circuitry producing an output signal corresponding to the signal from the selected audio signal source. 
     
     
       9. Apparatus as claimed in claim 8, including a sigma-delta modulator stage having its input coupled to receive said output signal. 
     
     
       10. Apparatus as claimed in claim 9, wherein said modulator stage is of the switched-capacitor type. 
     
     
       11. Apparatus as claimed in claim 9, wherein the output of said modulator output is coupled to a filter/decimator. 
     
     
       12. Apparatus as claimed in claim 1, wherein said a-c gain circuit comprises means to change the gain. 
     
     
       13. Apparatus as claimed in claim 12, wherein said gain changing means comprises a plurality of capacitors selectively connectable into said circuit. 
     
     
       14. Apparatus as claimed in claim 1, wherein said capacitor is connected between a pin of said IC chip and system common, externally of said chip. 
     
     
       15. Analog-to-digital conversion means for use as part of signal-processing means incorporated in a system having a signal common and comprising an IC chip for converting analog input signals to corresponding digital signals to be directed to a digital signal processing and/or storage device of said system; said IC chip including:   an input signal selection circuit having a plurality of input lines respectively connectible to different input signal sources;   at least one buffer amplifier having an output signal line;   switch means for coupling any one of said input signals to the input of said buffer amplifier;   a reference signal line;   a switched-capacitor circuit having two input terminals, one of said terminals being connected to said output signal line and the other being connected to said reference signal line; and   a capacitor fixedly connected through a non-switched connection between said reference signal line and signal common.   
     
     
       16. Apparatus as claimed in claim 15, including two buffer amplifiers providing different gains; and second switch means for selecting the output of either of said buffer amplifiers and for connecting the selected output through said output signal line to said one terminal of said switched-capacitor circuit.   
     
     
       17. Apparatus as claimed in claim 16, wherein said first switch means provides for selectable connection of said input signal sources to both of said buffer amplifiers. 
     
     
       18. Apparatus as claimed in claim 16, wherein said switched-capacitor circuitry is a balanced circuit having two parallel signal paths; means coupling said two input terminals to said parallel signal paths respectively;   first and second controllable capacitors in series with said signal paths respectively; and   means for programming the magnitudes of said controllable capacitors to provide for correspondingly altering the gain of said switched-capacitor circuitry.   
     
     
       19. Apparatus as claimed in claim 18, including first and second clocked switches in series with each of said signal paths, each switch having input and output nodes with the input nodes being coupled to said input terminals respectively and said output nodes being coupled to said controllable capacitors respectively. 
     
     
       20. Apparatus as claimed in claim 19, including first and second cross-over circuits each coupled between a respective one of said input terminals in one of said signal paths and the output node of the clocked switch in the other signal path. 
     
     
       21. Apparatus as claimed in claim 15, including an output stage coupled to the output of said switched-capacitor circuitry. 
     
     
       22. Apparatus as claimed in claim 21, wherein said output stage comprises amplifier means. 
     
     
       23. Apparatus as claimed in claim 22, wherein said output stage includes a balanced circuit having first and second input terminals and first and second clocked switches coupled to said input terminals respectively. 
     
     
       24. Apparatus as claimed in claim 23, wherein said output stage clocked switches have input and output nodes, said amplifier means having first and second input terminals coupled to the output nodes of said output stage clocked switches. 
     
     
       25. Apparatus as claimed in claim 21, wherein said output stage comprises switched-capacitor circuitry producing an output signal corresponding to the signal from the selected input signal source. 
     
     
       26. Apparatus as claimed in claim 25, including a sigma-delta modulator stage having its input receiving said output signal. 
     
     
       27. Apparatus as claimed in claim 26, wherein said modulator stage is of the switched-capacitor type. 
     
     
       28. Apparatus as claimed in claim 27 , wherein the output of said modulator is coupled to a filter/decimator. 
     
     
       29. An a-c gain circuit for use as part of signal-processing means to be incorporated in a system having a signal common and comprising: (1) an IC chip including:   an input signal selection circuit having a plurality of input lines respectively connectible to different input signal sources;   an input signal line;   a reference signal line;   switched-capacitor circuitry having an input signal circuit and an output signal circuit, said input signal circuit including two input terminals;   means coupling said two input terminals to said input signal line and to said reference signal line respectively;   amplifier means coupled between said input signal circuit and said output signal circuit to provide amplification of the signals passing through said switched-capacitor circuitry; and   (2) a capacitor fixedly connected through non-switched circuitry between said reference signal line and signal common.   
     
     
       30. Apparatus as claimed in claim 29, wherein said switched-capacitor circuit is a balanced circuit having first and second clocked switches coupled to said two input terminals respectively. 
     
     
       31. Apparatus as claimed in claim 30, wherein said clocked switches have input and output nodes, said amplifier having first and second input terminals coupled to the output nodes of said clocked switches respectively. 
     
     
       32. Apparatus as claimed in claim 31, wherein said output signal circuit includes switched-capacitor output circuitry producing an output signal corresponding to the signal from the selected input signal source. 
     
     
       33. Apparatus as claimed in claim 32, including a sigma-delta modulator stage having its input receiving said output signal. 
     
     
       34. Apparatus as claimed in claim 33, wherein said modulator stage is of the switched-capacitor type. 
     
     
       35. Apparatus as claimed in claim 34, wherein the output of said modulator is coupled to a filter/decimator. 
     
     
       36. In an a-c gain circuit for use as part of signal-processing means to be incorporated in a system having a signal common, and wherein the gain circuit comprises an IC chip providing an input signal line and a reference signal line to direct an input signal carried on an input signal line and a reference signal line to the input signal circuit of switched-capacitor gain circuitry having first and second input terminals to be connected to said input signal line and reference signal line respectively, said switched-capacitor gain circuitry having an output signal circuit, the a-c gain circuit including amplifier means connected to one of said signal circuits; the method of reducing the effect of unwanted d-c signals on the performance of the a-c gain circuit comprising the steps of:   developing on a capacitor a voltage corresponding to said unwanted d-c signals; and   coupling said capacitor between said reference signal line and said system common to prevent introducing said unwanted d-c signals into the gain of said a-c gain circuit.   
     
     
       37. The method of claim 36, wherein said capacitor is coupled between a pin of said IC chip and said system common externally of said chip. 
     
     
       38. The method of claim 36, wherein said gain-changing means is operable to alter the gain of said a-c gain stage. 
     
     
       39. The method of claim 38, wherein said gain-changing is effected by selectively coupling one or more of a plurality of switch-controlled capacitors into said gain stage.