High frequency slope compensation circuit for current programmed converter

Abstract

A slope compensation circuit for use with current-programmed switching DC to DC converters is provided which allows operation of the switching converters in the 1-2 MHz range. The circuit avoids feedback of an output voltage which includes the effects of a partially discharged slope capacitor without adding unnecessary delay by using a switch to bypass the discharging slope capacitor and coupling an input stage of the slope compensation circuit to an output driver. A delay in feeding back the output of the slope compensation circuit is provided to assure that the bypassing switch has settled.

What is claimed is: 
     
       1. A slope compensation circuit comprising: an input stage for comparing a feedback signal, with a command signal;   an output driver for providing an output command with a periodic sawtooth ramp and for providing the feedback signal;   a slope-generating capacitor;   constant current means for charging said slope-generating capacitor;   means for periodically discharging said slope-generating capacitor comprising a switched resistance connected across said slope-generating capacitor;   first switch means for connecting and disconnecting said slope-compensating capacitor from said output driver, said switch means disconnecting said slope generating capacitor from said output driver when said slope-generating capacitor is being discharged;   second switch means for bypassing said slope generating capacitor and coupling said input stage to said output driver when said slope-generating capacitor is being discharged; and   a hold capacitor for receiving said feedback signal from said output driver when said slope compensating capacitor is being bypassed and for providing said signal to said input stage.   
     
     
       2. The slope compensation circuit of claim 1 further comprising: third switch means connecting said feedback signal to said hold capacitor; and   delay means for controlling the closing of said third switch means until after said second switch means for bypassing said slope generating capacitor has settled, said delay means being initiated when said slope-generating capacitor is being discharged.   
     
     
       3. A circuit comprising: a current programmed switching DC to DC converter having a semiconductor switch for controlling the transfer of power from input to output and comparison means for comparing a signal representative of semiconductor switch current to a threshold signal for determining when to turn off said semiconductor switch;   a slope compensation circuit for generating said threshold signal, said slope compensation circuit including an input stage for comparing a feedback signal with a command signal; an output driver for providing an output command with a periodic sawtooth ramp and for providing the feedback signal; a slope-generating capacitor; constant current means for charging said slope-generating capacitor; means for periodically discharging said slope-generating capacitor comprising a switched resistance; first switch means for connecting and disconnecting said slope-compensating capacitor from said output driver, said first switch means disconnecting said slope generating capacitor from said output driver when said slope-generating capacitor is being discharged; second switch means for bypassing said slope generating capacitor and connecting said input stage to said output driver when said slope-generating capacitor is being discharged; and a hold capacitor for receiving said feedback signal from said output driver when said slope compensating capacitor is being bypassed and for providing said signal to said input stage, said means for periodically discharging said slope-generating capacitor functioning when said semiconductor switch is not conducting.   
     
     
       4. The circuit of claim 3 further comprising: third switch means connecting said feedback signal to said hold capacitor; and   delay means for controlling the closing of said third switch means until after said second switch means for bypassing said slope generating capacitor has settled, said delay means being initiated when said slope-generating capacitor is being discharged.