Exponential circuit

Abstract

An exponential circuit according to the present invention converts voltage level to time by using a charged voltage of RC circuit RC 1 , registers time as a clock number at a digital counter and performs bit shift for the registered data.

What is claimed is: 
     
       1. An exponential circuit comprising: i) a first RC circuit with a resistance and a capacitance, said capacitance being connected with a first terminal of said resistance at a first terminal and with the earth at a second terminal, provided with an output terminal at the juncture between said resistance and said capacitance, provided with an input terminal at a second terminal of said resistance for receiving a stepwise start signal;   ii) a second RC circuit with a resistance and a capacitance, said capacitance being connected with a first terminal of said resistance at a first terminal and with the earth at a second terminal, provided with an output terminal at the juncture between said resistance and said capacitance, provided with an input terminal at a second terminal of said resistance for receiving said stepwise start signal;   iii) a comparator means for outputting a stop signal when a difference is more than a predetermined value between an output of an input voltage and said first RC circuit;   iv) a counter means for receiving said start signal, said stop signal and a reference clock with a predetermined frequency so as to count number of said reference clock between said start signal and stop signal with increasing number or with decreasing number, said increasing number and decreasing number being alternatively selective; and   v) a switching means, receiving an output from said counter means, for disconnecting said resistance from said capacitance of said second RC circuit; and   vi) a shifting means for bitwisely shifting data of said counter means.   
     
     
       2. An exponential circuit comprising: i) a RC circuit with a resistance and a capacitance, said capacitance being connected with a first terminal of said resistance at a first terminal and with the earth at a second terminal, provided with an output terminal at the junction between said resistance and capacitance, provided with an input terminal at a second terminal of said resistance receiving a stepwise start signal;   ii) a switching means for disconnecting said resistance from said capacitance of said RC circuit;   iii) a comparator means for outputting a stop signal when a difference is more than a predetermined value between an output of an input voltage and said RC circuit;   iv) a counter means for receiving said start signal, said stop signal and a reference clock with a predetermined frequency so as to count number of said reference clock between said start signal and stop signal with increasing number or with decreasing number, said increasing number and decreasing number being alternatively selective, and for generating an output signal to control said switching means; and   v) a shifting means for bitwisely shifting data of said counter means.