Cordless transducer phase reference and data communication apparatus and method for digitizers

Abstract

A device for indicating the phase of the a full-frequency alternating current (AC) magnetic field signal transmitting from the pointing device of a cordless digitizer and for determining if the phase of a half-frequency alternating current (AC) magnetic field signal transmitting from the pointing device is approximately the same or approximately inverted from an immediately preceding half-frequency signal from the pointing device. The indication of the phase of the full-frequency pointing device signal is used by the digitizer logic circuits to determine the location of the pointing device on the tablet's sensing surface. The information concerning the change in phase of the half-frequency signal is used by the digitizer logic circuits to decode the status of various pointing device buttons. If the phase in the induced half-frequency signal is unchanged from the last, this no-change condition represents one binary state. If the phase has changed, the condition represents the other binary state. Accordingly, a binary encoded message may be transferred from the pointing device to the digitizer tablet for decoding via this phase change method.

Wherefore, what is claimed is: 
     
       1. A cordless digitizer comprising: a) a pointing device capable of separately transmitting first and second alternating current (AC) magnetic field signals, said pointing device second signal having a lower frequency than said pointing device first signal and being in one of two phase states differing by 180 degrees; and,   b) a tablet including, b1) a means for indicating the phase of said pointing device first signal, from a full-frequency signal and a lower-frequency signal induced in a sensing conductor, wherein said induced full-frequency signal is induced by said pointing device first signal and said induced lower-frequency signal is induced by said pointing device second signal, and,   b2) a means for determining if the phase of said lower-frequency signal induced in said sensing conductor by said pointing device is approximately the same or approximately inverted in comparison to a lower-frequency reference signal, said lower-frequency reference signal being generated by electronics disposed in the tablet and having essentially the same frequency as the lower-frequency signal induced in said sensing conductor.     
     
     
       2. The cordless digitizer of claim 1, wherein said pointing device second signal has one-half the frequency of the pointing device first signal, and said pointing device first signal phase indicating means comprises: a) a reference signal generating means for providing reference signals having about the same frequency as said induced full-frequency signal wherein a first reference signal is approximately in phase with said induced full-frequency signal and a second reference signal has a phase about 90 degrees skewed from said induced full-frequency signal, said reference signals being provided in response to inputs of said induced full-frequency signal whenever said pointing device is transmitting said pointing device first signal and an induced half-frequency signal whenever said pointing device is transmitting said pointing device second signal;   b) a half-frequency signal present indicating means for providing a half-frequency present signal indicating said pointing device is transmitting said pointing device second signal, said half-frequency present signal being provided in response to inputs of a signal induced by said pointing device in said conductor and said first reference signal; and,   c) a pointing device signal phase indicator means for providing a pointing device phase state signal indicating whether said induced full-frequency signal is closer to being one of (i) in phase with, and (ii) 180 degrees out of phase with said pointing device first signal, said pointing device phase state signal being provided in response to inputs of said induced half-frequency signal and said second reference signal.   
     
     
       3. The cordless digitizer of claim 2, wherein said induced half-frequency signal phase determining means comprises: a) said reference signal generating means;   b) said half-frequency signal present indicating means;   c) said pointing device signal phase indicator means; and,   d) a half-frequency phase state indicator means for providing a half-frequency phase state signal indicating whether said induced second signal has one of (i) a phase substantially the same as, and (ii) a phase about 180 degrees different from a half-frequency reference signal, said half-frequency phase state signal being provided in response to inputs of said half-frequency reference signal which is formed by comparing said first reference signal and said pointing device phase state signal, and said induced half-frequency signal.   
     
     
       4. The cordless digitizer of claim 3, wherein said reference signal generating means comprises: a) a first phase-lock loop (PLL) means for providing said first and second reference signals whenever said induced full-frequency signal is present at an input of said reference signal generating means, said first PLL means including a means for enabling said first PLL means only when said induced full-frequency signal is present at said reference signal generating means input; and,   b) a second phase-lock loop (PLL) means for providing said first and second reference signals whenever said induced half-frequency signal is present at said reference signal generating means input, said second PLL means including a means for enabling said second PLL only when said induced half-frequency signal is present at said reference signal generating means input.   
     
     
       5. The cordless digitizer of claim 4, wherein said first PLL means comprises: a) a voltage controlled oscillator (VCO) running at a base frequency twice that of said induced full-frequency signal and including, a1) a first output for outputting a signal at a frequency about twice that of said induced full-frequency signal,   a2) a second output for outputting a signal having approximately the same frequency and phase as said induced full-frequency signal,   a3) a third output for outputting a signal having approximately the same frequency as, but 90 degrees out of phase as said induced full-frequency signal, and,   a4) a control input for inputting voltage signals for maintaining said VCO base frequency at twice that of said induced full-frequency signal;     b) an exclusive-OR gate including, b1) a first input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present,   b2) a second input connected to said third VCO output, and,   b3) an output for outputting a digital signal at a frequency approximately twice that of said induced full-frequency signal;     c) a tri-state buffer with an input connected to said exclusive-OR gate output wherein whenever said half-frequency present signal is not present at an enable/disable input of said tri-state buffer said signal output from said exclusive-OR gate is allowed to pass through to an output, whereas when said half-frequency present signal is present at said enable/disable input no signal is allowed to pass;   d) a resistor having an input connected to said tri-state buffer output, and an output; and,   e) a filter including, e1) an input connected to said tri-state buffer output wherein whenever said digital signal is output from said exclusive-OR gate and allowed to pass through said tri-state buffer, said digital signal is smoothed such that it becomes a substantially continuous analog voltage signal, and,   e2) an output connected to said VCO control input for outputting said analog voltage signal.     
     
     
       6. The cordless digitizer of claim 5, wherein said second PLL means comprises: a) said voltage controlled oscillator (VCO);   b) an edge corrector means including, b1) a first input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present,   b2) a second input connected to said first VCO output,   b3) a means for preventing an output signal from said edge corrector means if said induced half-frequency signal is not present at said first edge corrector input; and   b4) an output for outputting a digital signal having a higher voltage if the phase of said first VCO output signal is leading that of said induced half-frequency signal, and a lower voltage if the phase of said first VCO output signal is lagging that of said induced half-frequency signal; and,     c) said filter wherein additionally said filter input is connected to said edge corrector means such that whenever said digital signal is output from said edge corrector means, said digital signal is smoothed so as to becomes a substantially continuous analog voltage signal.   
     
     
       7. The cordless digitizer of claim 6, wherein said edge corrector means comprises: a) a first flip-flop including, a1) a "D" input for inputting said first VCO output signal,   a2) an edge trigger input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present at said edge trigger input,   a3) an inverted "Q" output for outputting a low whenever said first VCO output signal is high and said edge trigger input is high, and a high whenever said first VCO output is low and said edge trigger input is high;     b) an inverter with an input for inputting said induced full-frequency signal and said half-frequency signal, whichever is present at said inverter input, and an output for outputting an inverted version of said inputted signals;   c) a second flip-flop including, c1) a "D" input for inputting said first VCO output signal,   c2) an edge trigger input connected to said inverter output for inputting said inverted version of said induced full-frequency signal and said induced half-frequency signal, whichever is present at said edge trigger input,   c3) an inverted "Q" output for outputting a low whenever said first VCO output signal is high and said edge trigger input is high, and a high whenever said first VCO output is low and said edge trigger input is high;     d) a first NAND gate including, d1) a first input for inputting a signal indicating the presence of said induced half-frequency signal at said first flip-flop edge trigger input and said inverter input,   d2) a second input for inputting said induced full-frequency signal and said half-frequency signal, whichever is present at said first NAND gate second input;     e) a second NAND gate including, e1) a first input for inputting a signal indicating the presence of said induced half-frequency signal at said first flip-flop edge trigger input and said inverter input,   e2) a second input for inputting said inverted version of said induced full-frequency signal and said half-frequency signal, whichever is present at said second NAND gate second input;     f) a first tri-state buffer including, f1) an input connected to said inverted "Q" output of said first flip-flop;   f2) an enabling/disabling input connected to said first NAND gate inverting output;   f3) an output which outputs a signal output from said inverted "Q" output of said first flip-flop whenever said first NAND gate enables said first tri-state buffer;     g) a second tri-state buffer including, g1) an input connected to said inverted "Q" output of said second flip-flop;   g2) an enabling/disabling input connected to said second NAND gate inverting output;   g3) an output which outputs a signal output from said inverted "Q" output of said second flip-flop whenever said second NAND gate enables said second tri-state buffer; and,     h) a resistor having an input connected to said first tri-state buffer output and said second tri-state buffer output, and an output.   
     
     
       8. The cordless digitizer of claim 3, wherein said half-frequency signal present indicator means comprises: a) an exclusive-OR gate including, a1) a first input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present at said first exclusive-OR gate input,   a2) a second input for inputting said first reference signal from said reference signal generator means,   a3) an output providing an output signal;     b) a signal integrator means having an input connected to said exclusive-OR gate output for providing an integrated signal at an output wherein said integrated signal is produced from said output signal from said exclusive-OR gate;   c) a decision thresholder means having an input connected to said signal integrator means output for providing a signal at an output whenever said integrated signal exceeds a predetermined threshold level; and,   d) a windowing means having an input connected to said decision thresholder means output for providing at an output said half-frequency present signal for a predetermined period of time in response to said decision thresholder output signal, said predetermined period of time being substantially equal to the period of time said pointing device outputs said signal having one-half the frequency of said full-frequency inducing signal.   
     
     
       9. The cordless digitizer of claim 3, wherein said pointing device signal phase indicator means comprises: a) an edge sampler means providing a low level signal when said induced full-frequency signal is closer to being in phase with said full-frequency inducing signal transmitting from said pointing device and a high level signal when said induced full-frequency signal is closer to being 180 degrees out of phase with said full-frequency inducing signal transmitting from said pointing device, in response to a comparison of said induced half-frequency signal and said second reference signal, including, a1) a first input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present at said first edge sampler input,   a2) a second input for inputting said second reference signal from said reference signal generator means,   a3) a third input for inputting said half-frequency present signal from said half-frequency signal indicating means, and,   a4) a pair of output for outputting one of said high level signal and said low level signal;     b) a signal integrator means having inputs respectively connected to said edge sampler means outputs for providing an integrated signal at an output wherein said integrated signal is produced from said output signal from said edge sampler means; and,   c) a decision thresholder means having an input connected to said signal integrator means output for providing a high level pointing device phase state signal at an output whenever said integrated signal exceeds a predetermined threshold level.   
     
     
       10. The cordless digitizer of claim 9, wherein said edge sampler means comprises: a) a first AND gate including, a1) a first input for inputting said half-frequency present signal,   a2) a second input for inputting said induced full-frequency signal and said half-frequency signal, whichever is present at said first AND gate second input,   a3) an output for outputting a signal;     b) an inverter with an input for inputting said induced full-frequency signal and said half-frequency signal, whichever is present at said inverter input, and an output for outputting an inverted version of said inputted signals;   c) a second AND gate including, c1) a first input for inputting said half-frequency present signal,   c2) a second input connected to said inverter output for inputting said inverted version of said induced full-frequency signal and said half-frequency signal, whichever is present at said second AND gate second input,   c3) an output for outputting a signal;     d) a first flip-flop including, d1) a "D" input for inputting said second reference signal,   d2) an edge trigger input connected to said first AND gate output for inputting said first AND gate output signal,   d3) a "Q" output for outputting a low level signal whenever said second reference signal is low and said edge trigger input is high, and a high level signal whenever said second reference signal is high and said edge trigger input is high; and,     e) a second flip-flop including, e1) a "D"l0 input for inputting said second reference signal,   e2) an edge trigger input connected to said second AND gate output for inputting said second AND gate output signal,   e3) a "Q" output for outputting a low level signal whenever said second reference signal is low and said edge trigger input is high, and a high level signal whenever said second reference signal is high and said edge trigger input is high.     
     
     
       11. The cordless digitizer of claim 3, wherein said half-frequency phase state indicator means comprises: a) a first exclusive-OR gate including, a1) a first input connected to said reference signal generator means output for inputting said first reference signal,   a2) a second input connected to said pointing device signal phase indicator means output for inputting said pointing device phase state signal,   a3) an output providing an output signal;     b) a divide-by-two counter with an input connected to said first exclusive-OR gate output for providing at an output a signal having half the frequency as said first exclusive-OR gate output signal and wherein the rising edges of said half-frequency signal correspond to the rising edges of said first exclusive-OR gate output signal   c) a second exclusive-OR gate including, c1) a first input connected to said divide-by-two counter output for inputting said half-frequency signal,   c2) a second input for inputting said induced full-frequency signal and said induced half-frequency signal, whichever is present at said second exclusive-OR gate input,   c3) an output providing an output signal;     d) a signal integrator means having an input connected to said second exclusive-OR gate output for providing an integrated signal at an output wherein said integrated signal is produced from said output signal from said second exclusive-OR gate; and,   e) a decision thresholder means having an input connected to said signal integrator means output for providing said half-frequency phase state signal at an output whenever said integrated signal exceeds a predetermined threshold level.   
     
     
       12. The cordless digitizer of claim 1, wherein said pointing device comprises: a) a basic pointing device signal generator for generating upon activation a basic pointing device signal having a first frequency for a predetermined period of time;   b) a user activated button having a binary code associated therewith, wherein said code has a sequence of binary bits each bit being one of (i) a first binary state, and (ii) a second binary state;   c) a control logic means connected to said basic pointing device signal generator and said button for outputting whenever said button is activated a continuous signal having periods of signal at said first frequency and separate periods of signal having a second frequency which is lower than the first frequency wherein the signal at said second frequency has one of a first and second phase state differing by 180 degrees, and for encoding the continuous signal with said button code by making each period of signal at the second frequency sequentially correspond to the binary bits of said button code wherein the first phase corresponds to said first binary state and said second phase corresponds to said second binary state; and,   d) a driver connected to said control logic for driving a coil such that said first and second alternating current (AC) magnetic field signals are transmitted from a pointing device tip, and wherein the first AC magnetic field signal has the same frequency and phase state as the periods of signal output from the control logic means at said first frequency and the second AC magnetic field signal has the same frequency and phase state as the periods of signal output from the control logic means at said second frequency.   
     
     
       13. The cordless digitizer of claim 12, wherein said pointing device further comprises: at least one additional user activated button, wherein each additional button has a unique binary code associated therewith and is connected to said control logic means.   
     
     
       14. The cordless digitizer of claim 13, wherein said control logic means comprises: a) a binary sequence logic generator for outputting a signal representing the unique binary code associated with an activated pointing device button and for outputting an activating signal which activates the basic pointing device signal generator;   b) a buffer connected to the binary sequence logic generator for storing said binary code and outputting, whenever a control signal is received, a signal representing the first binary state if the next sequential binary bit making up the code corresponds to the first binary state and the second binary state if the next sequential binary bit making up the code corresponds to the second binary state;   c) a frequency divider for outputting a signal having a predetermined frequency which is lower than an inputted signal;   d) a switch connected to the basic pointing device frequency generator for routing the basic pointing device signal to the driver whenever a control signal is not received and routing the basic pointing device signal to the frequency divider for a duration of a period in which a control signal is received;   e) a burst controller connected to the buffer and the switch for outputting a control signal having a duration equal to a predetermined number of cycles of the basic pointing device signal and at a predetermined duty cycle;   f) a selective phase inverter connected to the frequency divider for changing the phase of the signal output from the frequency divider by 180 degrees whenever the selective phase inverter is enabled, said selective phase inverter being enabled whenever a signal representing the first binary state is received at an enabling input; and,   g) a selective delay device connected to the buffer for outputting a delayed version of the signal output from the buffer whenever that signal represents the first binary state and for outputting an undelayed version of the signal from the buffer whenever that signal represents the second binary state, said signal output from the selective delay device being input to the enabling input of the selective phase inverter.   
     
     
       15. A method of indicating the phase of a first alternating current (AC) magnetic field signal transmitting from a pointing device of a cordless digitizer and determining if the phase of a second AC magnetic field signal transmitting from said pointing device, which has a lower frequency than said pointing device first signal, is approximately the same or approximately inverted in phase from a lower frequency reference signal, from a full-frequency signal and a lower-frequency signal induced in a tablet sensing conductor of said cordless digitizer, wherein said induced full-frequency signal is induced by said pointing device first signal and said induced lower-frequency signal is induced by a pointing device second signal, the method comprising the steps of: a) generating reference signals having about the same frequency as said induced full-frequency signal wherein a first reference signal is approximately in phase with said induced full-frequency signal and a second reference signal has a phase about 90 degrees skewed from said induced full-frequency signal, said reference signals being provided in response to inputs of said induced full-frequency signal whenever said pointing device is transmitting said pointing device first signal and said induced lower-frequency signal whenever said pointing device is transmitting said pointing device second signal;   b) providing a lower-frequency present signal indicating said pointing device is transmitting said pointing device second signal, said lower-frequency present signal being provided in response to inputs of a signal induced by said pointing device in said conductor and said first reference signal;   c) providing a pointing device phase state signal indicating whether said induced full-frequency signal is closer to being one of (i)in phase with, and (ii) 180 degrees out of phase with said pointing device first signal, said pointing device phase state signal being provided in response to inputs of said induced lower-frequency signal and said second reference signal; and,   d) providing a lower-frequency phase state signal indicating whether said induced second signal has one of (i) a phase substantially the same as, and (ii) a phase about 180 degrees different from said lower-frequency reference signal, said lower-frequency phase state signal being provided in response to inputs of said lower-frequency reference signal which is formed by comparing said first reference signal and said pointing device phase state signal, and said induced lower-frequency signal.   
     
     
       16. The method of claim 15, wherein said step of generating said first and second reference signals comprises: a) providing said first and second reference signals using a first phase-lock loop (PLL) means whenever said induced full-frequency signal is present at said reference signal generating means input by enabling said first PLL means only whenever said induced full-frequency signal is present at said reference signal generating means input; and,   b) providing said first and second reference signals using a second phase-lock loop (PLL) means whenever said induced lower-frequency signal is present at said reference signal generating means input by enabling said second PLL only whenever said induced lower-frequency signal is present at said reference signal generating means input.   
     
     
       17. A device for use in a cordless digitizer having a pointing device capable of separately transmitting first and second alternating current (AC) magnetic field signals, said pointing device second signal having a lower frequency than said pointing device first signal and a tablet with sensing conductors, the device comprising: a) a means for indicating the phase of said pointing device first signal, from a full-frequency signal and a lower-frequency signal induced in a sensing conductor, wherein said induced full-frequency signal is induced by said pointing device first signal and said induced lower-frequency signal is induced by said pointing device second signal; and   b) a means for determining if the phase of said lower-frequency signal induced in said sensing conductor by said pointing device is approximately the same or approximately inverted in comparison to a lower-frequency reference signal, said lower-frequency reference signal being generated by electronics disposed in the tablet and having essentially the same frequency as the lower-frequency signal induced in said sensing conductor.   
     
     
       18. The device of claim 17, wherein said pointing device second signal has one-half the frequency of the pointing device first signal, and wherein said pointing device first signal phase indicating means comprises: a) a reference signal generating means for providing reference signals having about the same frequency as said induced full-frequency signal wherein a first reference signal is approximately in phase with said induced full-frequency signal and a second reference signal has a phase about 90 degrees skewed from said induced full-frequency signal, said reference signals being provided in response to inputs of said induced full-frequency signal whenever said pointing device is transmitting said pointing device first signal and an induced half-frequency signal whenever said pointing device is transmitting said pointing device second signal;   b) a half-frequency signal present indicating means for providing a half-frequency present signal indicating said pointing device is transmitting said pointing device second signal, said half-frequency present signal being provided in response to inputs of a signal induced by said pointing device in said conductor and said first reference signal; and,   c) a pointing device signal phase indicator means for providing a pointing device phase state signal indicating whether said induced full-frequency signal is closer to being one of (i) in phase with, and (ii) 180 degrees out of phase with said pointing device first signal, said pointing device phase state signal being provided in response to inputs of said induced half-frequency signal and said second reference signal.   
     
     
       19. The device of claim 18, wherein said induced half-frequency signal phase determining means comprises: a) said reference signal generating means;   b) said half-frequency signal present indicating means;   c) said pointing device signal phase indicator means; and,   d) a half-frequency phase state indicator means for providing a half-frequency phase state signal indicating whether said induced second signal has one of (i) a phase substantially the same as, and (ii) a phase about 180 degrees different from a half frequency reference signal, said half-frequency phase state signal being provided in response to inputs of said half-frequency reference signal which is formed by comparing said first reference signal and said pointing device phase state signal, and said induced half-frequency signal.   
     
     
       20. The device of claim 19, wherein said reference signal generating means comprises: a) a first phase-lock loop (PLL) means for providing said first and second reference signals whenever said induced full-frequency signal is present at an input of said reference signal generating means, said first PLL means including a means for enabling said first PLL means only when said induced full-frequency signal is present at said reference signal generating means input; and,   b) a second phase-lock loop (PLL) means for providing said first and second reference signals whenever said induced half-frequency signal is present at said reference signal generating means input, said second PLL means including a means for enabling said second PLL only when said induced half-frequency signal is present at said reference signal generating means input.