US5420483AExpiredUtility

Television deflection distortion correcting circuit

52
Assignee: SONY CORPPriority: Jan 29, 1993Filed: Jan 27, 1994Granted: May 30, 1995
Est. expiryJan 29, 2013(expired)· nominal 20-yr term from priority
H04N 3/233
52
PatentIndex Score
14
Cited by
4
References
12
Claims

Abstract

In an upper and lower pincushion distortion correcting circuit, so-called "cloak distortion" and "vertical intermediate-pincushion distortion" are corrected. A variable voltage source is connected to one end of a secondary winding of a transformer magnetically coupled with a primary winding thereof series-connected to a vertical deflection coil. A capacitor is connected between the other end of the secondary winding and the ground, and a series circuit constructed of a coil and a switch is connected in parallel to this capacitor. The so-termed "cloak distortion" is corrected by varying a resonance frequency of a sawtooth-shaped voltage in the horizontal scanning period, while an ON-period of the switch is controlled. Also, the "vertical intermediate-pincushion distortion" is corrected by varying an S-value of the sawtooth-shaped voltage in the vertical scanning period, while the source voltage of the variable voltage source is changed.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A deflection distortion correction circuit wherein a parabolic correction current generated at a horizontal scanning period is superimposed on a vertical deflection current and the superimposed current is supplied to a vertical deflection coil to correct distortion, comprising: a primary coil series connected to the vertical deflection coil for receiving the vertical deflection current;   a secondary coil having a first end and a second end, said secondary coil magnetically coupled to the primary coil;   a variable voltage source connected to the first end of said secondary coil, said variable voltage source adapted to generate a voltage across said secondary coil that is not proportional to the vertical deflection current; and   a resonance circuit connected to the second end of the secondary coil including a switch adapted to be turned ON/OFF at the horizontal scanning period thereby opening and closing the resonance circuit and inducing the parabolic correction current at the horizontal scanning period.   
     
     
       2. The deflection distortion circuit according to claim 1 wherein the switch has a variable ON/OFF period and variations in said ON/OFF period result in corresponding variations in a resonance frequency of the resonance circuit. 
     
     
       3. The deflection distortion circuit according to claim 1 wherein the ON time of the switch is variable. 
     
     
       4. The deflection distortion correction circuit of claim 3 wherein the switch is ON during at least part of a scanning interval of the horizontal scanning period. 
     
     
       5. The deflection distortion correction circuit of claim 3 wherein the switch includes a first diode having an anode connected to a collector of a first transistor and a cathode connected to an anode of a second diode, a cathode of the second diode connected to a collector of a second transistor. 
     
     
       6. The deflection distortion correction circuit of claim 5 wherein the first transistor is an NPN transistor and the second transistor is a PNP transistor. 
     
     
       7. The deflection distortion correction circuit of claim 6 wherein rectangular voltages having opposite polarities are applied to respective bases of the first and second transistor thereby turning the transistor ON/OFF. 
     
     
       8. The deflection distortion correction circuit of claim 7 wherein pulse widths of the rectangular voltages control the ON/OFF period of the switch. 
     
     
       9. The deflection distortion correction circuit of claim 5 wherein the transistors are MOS type field effect transistors. 
     
     
       10. The deflection distortion circuit according to claim 1 wherein the voltage generated by the variable voltage source is a sawtooth-shaped voltage proportional to the vertical deflection current except having an increased amplitude during intermediate portions of the vertical scanning period. 
     
     
       11. The deflection distortion correction circuit of claim 1 wherein the variable voltage source is a push-pull amplifier including a first transistor having an emitter coupled to the secondary coil and a base for receiving a generally sawtooth-shaped voltage at the vertical scanning period and a second transistor having an emitter coupled to the secondary coil and a base coupled to the base of the first transistor for receiving the generally sawtooth-shaped voltage at the vertical scanning period. 
     
     
       12. A deflection distortion correction circuit wherein a parabolic correction current generated at a horizontal scanning period is superimposed on a vertical deflection current and the superimposed current is supplied to a vertical deflection coil to correct distortion, comprising: a primary coil series connected to the vertical deflection coil for receiving the vertical deflection current;   a secondary coil having a first end and a second end, said secondary coil magnetically coupled to the primary coil;   a variable voltage source connected to the first end of said secondary coil, said variable voltage source adapted to generate a voltage across said secondary coil, said voltage being a sawtooth-shaped voltage proportional to the vertical deflection current except having an increased amplitude during intermediate portions of the vertical scanning period; and   a resonance circuit connected to the second end of the secondary coil including a switch adapted to be turned ON/OFF at the horizontal scanning period thereby opening and closing the resonance circuit and inducing the parabolic correction current at the horizontal scanning period, said switch having a variable period and being maintained in an ON position during at least part of a scanning interval of the horizontal scanning period and including a first diode with an anode connected to a collector of a first transistor and a cathode connected to an anode of a second diode, a cathode of the second diode connected to a collector of a second transistor.

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