US5436171AExpiredUtility

Photodiode array device and method for producing same

37
Assignee: ROHM CO LTDPriority: Dec 20, 1991Filed: Jun 21, 1994Granted: Jul 25, 1995
Est. expiryDec 20, 2011(expired)· nominal 20-yr term from priority
Inventors:Koichi Kudo
H10F 77/148H10F 39/18Y02E10/50
37
PatentIndex Score
5
Cited by
8
References
5
Claims

Abstract

The improved photodiode array has a structure that has pn-junctions arranged in a row on a semiconductor substrate 1 having an oxide film 2. The photodiode array has such a surface pattern that n-type impurity diffused layers 3 and p-type impurity diffused layers 4 are arranged in a generally concentric manner or with layers of one diffusion type alternating with layers of the other diffusion type. The improved process of fabrication comprises joining the oxide film 2 on the semiconductor substrate 1 to an n-type semiconductor layer 3 and then diffusing a p-type impurity within the n-type semiconductor layer 3 to form pn-junctions, thereby yielding a photodiode array. Thereby, it is provided a photodiode array that has such a simple structure that not only is the yield of device fabrication improved but also the cost of the final product is reduced.

Claims

exact text as granted — not AI-modified
I claim: 
     
       1. A method for producing a photodiode array, comprising the steps of: forming an oxide layer on a surface of a semiconductor substrate;   joining the semiconductor substrate having said oxide layer to a semiconductor substrate of a first conductive impurity type, with the oxide layer between the semiconductor substrate;   polishing a surface of said joined semiconductor substrate of a first conductive impurity type;   forming second conductive impurity-type layers in said surface-polished semiconductor substrate of a first conductive impurity type in such a way that pn-junctions are formed in a row extending along the surface of said surface-polished substrate so that first conductive impurity type layers are produced;   forming third conductive impurity diffused layers, having a higher conductive impurity concentration than the second conductive impurity type layer, in surface layer portions of said surface-polished substrate so as to span said pn-junctions, said third conductive impurity diffused layers having the same conductivity type as the substrate of a first conductive impurity type;   forming second oxide layers in surface areas of said pn-junctions; and   forming electrode layers that extend between the second oxide layers formed in surface areas of said pn-junctions.   
     
     
       2. A method according to claim 1 wherein said substrate of a first conductive impurity type is an n-type substrate and said second conductive impurity-type layers are each a p-type impurity layer. 
     
     
       3. A method according to claim 1 wherein said substrate of a first conductive impurity type is a p-type substrate and said second conductive impurity-type layers are each an n-type impurity layer. 
     
     
       4. A method according to claim 1 which includes an additional patterning step for providing a surface pattern that has said first conductive impurity-type and second conductive impurity-type layers arranged in a substantially concentric manner. 
     
     
       5. A process according to claim 1 which includes an additional patterning step for providing a surface pattern that comprises said first conductive impurity-type layers alternating with said second conductive impurity-type layers in a linear array.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.