US5446317AExpiredUtility

Single in-line package for surface mounting

57
Assignee: FUJITSU LTDPriority: Mar 9, 1992Filed: Mar 5, 1993Granted: Aug 29, 1995
Est. expiryMar 9, 2012(expired)· nominal 20-yr term from priority
H10W 90/756H10W 72/5522H10W 72/5445H10W 72/932H10W 70/60H10W 70/40H10W 90/00H10W 70/429H10W 74/111H05K 1/181H05K 3/301H05K 2201/10454H05K 2201/10606H05K 2201/10696
57
PatentIndex Score
22
Cited by
4
References
10
Claims

Abstract

A semiconductor package of a single in-line type including a semiconductor chip, a package body for accommodating the semiconductor chip and a plurality of leads held by the package body to extend substantially perpendicularly to a bottom edge surface of the package body. The package body carries a cutout part at a predetermined position of a side edge that surrounds the package body such that the cutout part is adapted for engagement with a support leg for supporting the package body substantially upright on a substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device having a package of a single in-line type, comprising: a semiconductor chip;   a package body that accommodates said semiconductor chip therein, said package body being defined by a pair of opposing major surfaces and surrounded by side walls connecting said pair of opposing major surfaces, said side walls including a bottom edge which extends in a direction perpendicular to said major surfaces, to form a substantially planar bottom edge surface;   a plurality of leads held by said package body so as to extend substantially perpendicularly to said bottom edge surface, each of said leads being electrically connected to said semiconductor chip, each of said leads comprising an inner part located inside said package body and an outer lead part located outside said package body, said outer lead part being bent laterally in the vicinity of the boundary between said inner part and said outer part, in one of a first and a second direction that are opposite from each other and substantially perpendicular to said opposing major surfaces; and   said package body having a cutout part at a predetermined position of said side wall, said cutout part being adapted for engagement with a support leg part for supporting said package body substantially upright on a substrate;   wherein said package body includes a lead frame, for holding said semiconductor chip thereon, said lead frame comprising a cutout portion for engagement with a support leg, said cutout part of said package body exposing said lead frame cutout portion.   
     
     
       2. A semiconductor package as claimed in claim 1, wherein said cutout part is formed at said bottom edge surface. 
     
     
       3. A semiconductor package as claimed in claim 1, wherein said side walls further comprise a side edge connecting said bottom edge to an opposing top edge of said package body wherein, said cut out part is formed at said side edge of the package body. 
     
     
       4. A semiconductor package as claimed in claim 1, wherein said package body includes a lead frame, for holding said semiconductor chip thereon, comprising a cutout portion for engagement with a support leg, said package cutout part exposing said lead frame cutout portion. 
     
     
       5. A semiconductor package as claimed in claim 4, wherein said lead frame cutout portion further comprises: a chamfer formed in said lead frame for facilitating said engagement of said support leg part; and   a groove provided in continuation to said chamfer for establishing said engagement with said support leg part.   
     
     
       6. A semiconductor package as claimed in claim 4, wherein said lead frame is formed of a metal. 
     
     
       7. A semiconductor package assembly, comprising: a plurality of packages of a single in-line type, each of said plurality of packages comprising: a semiconductor chip;   a package body that accommodates said semiconductor chip therein, said package body being defined by a pair of opposing major surfaces and surrounded by side walls connecting said pair of opposing major surfaces, said side walls including a bottom edge which extends in a direction perpendicular to said major surfaces, to form a substantially planar edge surface; and   a plurality of leads held by said package body so as to extend substantially perpendicularly to said planar edge surface, each of said leads being electrically connected to said semiconductor chip, each of said leads comprising an inner part located inside said package body, and an outer lead part located outside said package body, said outer lead part being bent laterally in the vicinity of the boundary between said inner part and said outer part, in one of a first and a second direction that are opposite from each other and substantially perpendicular to said opposing major surfaces;     said package body carrying a cutout part at a predetermined position of said side wall, said cutout part being adapted for engagement with a support leg part for supporting said package body substantially upright on a substrate; and   support leg means provided commonly to said plurality of packages such that said support leg means is accommodated into said cutout part, said support leg means supporting said plurality of said packages substantially upright upon a common substrate.   
     
     
       8. A semiconductor package assembly as claimed in claim 7, wherein said support leg means comprises a member having an L-shaped cross section. 
     
     
       9. A semiconductor package assembly as claimed in claim 7, wherein said support leg means comprises a member having a T-shaped cross section. 
     
     
       10. A semiconductor package assembly as claimed in claim 7, wherein said support leg means comprises a member having a rectangular cross section.

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