Comparator controlled delay-on-break devices

Abstract

A delay-on-break circuit adaptable for A.C. or D.C. applications utilizes a timer and a pair of comparators to prevent a load from being re-energized until at least a predetermined period of time has elapsed since the most recent deenergization of the load. A feedback element, such as a zener diode, connected between the output of one of the comparators and a feedback input thereof provides reliable latching of the load through zero crossings of the line in A.C. applications without use of a latching capacitor while simultaneously providing brownout protection capable of rapidly deenergizing the load in the event of an undesired decrease in line voltage.

What is claimed is: 
     
       1. A circuit connectable to a line and an electrical load for preventing the load from being energized by the line until at least a predetermined time period has elapsed since the most recent deenergization of the load, said circuit comprising: (a) a switching device connectable across the line in series with the load, said switching device having a control input controllable to enable the line to energize the load;   (b) a first comparator having a first output coupled to said control input for controlling said control input and further having a first reference input and a feedback input;   (c) a second comparator having a second output coupled to said feedback input and further having a timer input and a second reference input;   (d) a power supply coupled to the line and having a reference voltage line coupled to said first and second reference inputs;   (e) timer means coupled to said first output and to said timer input for maintaining a condition between said timer input and said second reference input appropriate to prevent said second output from causing said control input to enable energization of the load until at least said predetermined period of time has elapsed since the load was most recently deenergized.   
     
     
       2. The circuit of claim 1 wherein the line is an A.C. line and said switching device comprises a semiconductor device. 
     
     
       3. The circuit of claim 2 wherein said semiconductor device comprises a triac. 
     
     
       4. The circuit of claim 2 further comprising a feedback element coupled between said first output and said feedback input to permit energization of said load to be maintained notwithstanding zero crossings of the A.C. line. 
     
     
       5. The circuit of claim 4 wherein said feedback element comprises a resistor. 
     
     
       6. The circuit of claim 4 wherein said feedback element comprises a zener diode. 
     
     
       7. The circuit of claim 1 wherein said timer means comprises an R-C network coupled to said first output by way of a charging path through which said R-C network is charged when the load is energized. 
     
     
       8. The circuit of claim 7 further comprising a rectifier in said charging path, said rectifier being polarized to prevent discharging of said R-C network through said charging path. 
     
     
       9. The circuit of claim 1 wherein the line is either a D.C. line or an A.C. line.