Semiconductor device and manufacturing method therefor

Abstract

A semiconductor device, which can easily form hyper abrupt junction type junction having a desired depletion layer width or transition region width, is disclosed. A silicon oxide film is formed on the mirror polished side surface of a P-type semiconductor substrate. Then, a P-type diffusion layer is formed by means of heat treatment. In this process, impurity concentration distribution is formed in such a way that the impurity concentration distribution can abruptly decrease from the mirror polished side surface of the substrate. Following this, the oxide film is removed by etching, and hyper abrupt type PN junction is obtained by sticking the mirror polished side surface of a high impurity concentration N-type semiconductor substrate and the high impurity concentration diffusion side of the above P-type semiconductor substrate to each other in the same surface direction as that of the above P-type semiconductor substrate. Then, the P-type semiconductor substrate is ground and polished from the non-mirror polished surface side for thinning. Finally, a silicon oxide film is formed on the ground and polished surface side, ions are implanted thereinto and heat treatment is provided thereto within the nitrogen atmosphere to form a P + -type diffusion layer.

What is claimed is: 
     
       1. A semiconductor device comprising: a first semiconductor substrate of a first conductivity type;   an impurity layer of the first conductivity type formed on a main surface of the first semiconductor substrate and having impurity distribution in which impurity concentration abruptly lowers in a depth direction from the main surface side of the first semiconductor substrate; and   a second semiconductor substrate of a second conductivity type forming a bonded interface between the main surface of the first semiconductor substrate on the impurity layer side and a main surface of the second semiconductor substrate, having hyper abrupt type PN junction between the impurity layer and the second semiconductor substrate.   
     
     
       2. The semiconductor device according to claim 1, wherein the impurity layer has impurity distribution in which the impurity concentration lowers exponential functionally or linearly in the depth direction from the main surface side of the first semiconductor substrate. 
     
     
       3. The semiconductor device according to claim 1, wherein the impurity layer has impurity distribution in which the concentration distribution of the impurity is in proportion to a (-3/2) power of a depth from the main surface side of the first semiconductor substrate in the depth direction from the main surface side of the first semiconductor substrate. 
     
     
       4. The semiconductor device according to claim 1, wherein the second semiconductor substrate further comprises a second impurity layer of the second conductivity type formed within the second semiconductor substrate and having impurity distribution in which the impurity concentration lowers exponential functionally or linearly in a depth direction from the main surface side of the second semiconductor substrate. 
     
     
       5. The semiconductor device according to claim 4, wherein the second impurity layer has impurity distribution in which the concentration distribution of the impurity is in proportion to a (-3/2) power of a depth from the main surface side of the second semiconductor substrate in the depth direction from the main surface side of the second semiconductor substrate. 
     
     
       6. The semiconductor device according to claim 1, further comprising a third impurity layer within the second semiconductor substrate formed within a depth of 0 to 0.1 μm from the main surface side of the second semiconductor substrate and having the first conductivity type. 
     
     
       7. The semiconductor device according to claim 1, wherein the impurity layer of the first conductivity type has a peak impurity concentration of approximately 10 19  cm -3  and a decreasing impurity concentration at 1 order per approximately 50 nm in the depth direction. 
     
     
       8. The semiconductor device according to claim 1, wherein the impurity concentration of a highest part of the impurity distribution in the impurity layer of the first semiconductor substrate is approximately 10 19  cm -3  or more, the impurity concentration of a highest part of the impurity distribution in the second semiconductor substrate is approximately 10 19  cm -1  or more, and a distance between the highest part of the impurity distribution in the impurity layer of the first semiconductor substrate and the highest part of the impurity distribution in the second semiconductor substrate is approximately 50 nm or less. 
     
     
       9. A manufacturing method for a semiconductor device comprising the steps of: forming an insulating film on a first semiconductor substrate of a first conductivity type;   implanting impurities of the first conductivity type through the insulating film into the first semiconductor substrate so that impurity distribution can abruptly lowers in a depth direction from a main surface side;   removing the insulating film;   bonding the main surface of the first semiconductor substrate and a main surface of a second semiconductor substrate of a second conductivity type to each other; and   forming a PN junction between the first semiconductor substrate and the second semiconductor substrate by heat treating the bonded first semiconductor substrate and second semiconductor substrate.   
     
     
       10. The manufacturing method for a semiconductor device according to claim 9, wherein the implanting step includes a step of implanting the impurities of the first conductivity type into the first semiconductor substrate so that the impurity distribution is in proportion to a (-3/2) power of a depth from the main surface side of the first semiconductor substrate in the depth direction from the main surface side of the first semiconductor substrate. 
     
     
       11. The manufacturing method for a semiconductor device according to claim 9, further comprising a step of implanting impurities of the second conductivity type into the second semiconductor substrate of the second conductivity type between the first conductivity type impurities implanting step and the bonding step so that impurity distribution of the second semiconductor substrate abruptly decreases in a depth direction from the main surface side of the second semiconductor substrate. 
     
     
       12. The manufacturing method for a semiconductor device according to claim 11, wherein the implanting step of implanting the second conductivity type impurities includes a step of implanting the impurities of the second conductivity type into the second semiconductor substrate so that the concentration distribution of the impurity is in proportion to a (-3/2) power of a depth from the main surface side of the second semiconductor substrate in the depth direction from the main surface side of the second semiconductor substrate. 
     
     
       13. The manufacturing method for a semiconductor device according to claim 9, further comprising a step of forming a third impurity layer which moves a position of the PN junction from the bonded interface in the depth direction of the second semiconductor substrate for 0 to 0.1 μm by implanting impurities of the first conductivity type into a region of 0 to 0.1 μm in depth from the main surface side of the second semiconductor substrate, the third impurity layer forming step being provided between the implanting step and the bonding step.