Stress mode circuit for an integrated circuit with on-chip voltage down converter

Abstract

A stress mode circuit is provided to generate a voltage that is either equal to a reference voltage or is a proportion of an external voltage (VCCEXT). The circuit includes two voltage divider circuits to provide the proportion voltage. Two differential amplifiers are provided to generate outputs corresponding to a comparison to the proportion voltage and the reference voltage. The outputs operate switches that couple the reference voltage or the proportion voltage to an output terminal.

What is claimed as the invention is: 
     
       1. A stress mode circuit comprising: a comparison circuit having a plurality of outputs and coupled to receive and compare a reference voltage with a first voltage derived from a supply voltage;   a plurality of switches each respectively coupling said reference voltage and said first voltage to a common output terminal and each respectively controlled by one of said plurality of outputs; and   a voltage converter coupled between said common output terminal and an output terminal of said stress mode circuit for providing an internal voltage to said output terminal and said comparison circuit,   wherein said reference voltage and said first voltage are selectively coupled to said common output terminal via said plurality of switches in response to the comparison of the reference voltage and said first voltage, and wherein said comparison circuit is powered by said supply voltage.   
     
     
       2. The circuit of claim 1 wherein said switches are responsive to said comparison circuit so that a larger one of said reference voltage and said first voltage is selectively coupled to said common output terminal. 
     
     
       3. The circuit of claim 1 further comprising a voltage generator coupled to said supply voltage to generate said first voltage. 
     
     
       4. The circuit of claim 3 wherein said voltage generator includes at least one voltage divider circuit connected to receive said supply voltage and produce therefrom said first voltage, of a magnitude lower than the supply voltage, for application to said comparison circuit. 
     
     
       5. The circuit of claim 1 wherein said comparison circuit includes at least two differential amplifiers coupled to receive said reference voltage and said first voltage and to generate respective outputs that have opposite states in response to the comparison of said reference voltage and said first voltage. 
     
     
       6. The circuit of claim 5 wherein said plurality of switches includes at least two switches, wherein said switches are responsively coupled to said respective outputs of said differential amplifiers thereby to couple a selected one of said reference voltage and said first voltage to said common output terminal. 
     
     
       7. A stress mode circuit comprising: first and second voltage generator circuits coupled to a supply voltage for generating respective first and second outputs;   first and second comparison circuits each having respective first and second input terminals and respective outputs, said comparison circuits being powered by said supply voltage which is greater in magnitude than magnitudes of said first and second outputs from said first and second voltage generator circuits;   said first input terminal of said first comparison circuit and said second input terminal of said second comparison circuit being coupled to receive a reference voltage,   said second input terminal of said first comparison circuit and said first input terminal of said second comparison circuit being coupled to receive said first output;   a first switch coupling said reference voltage to a common output terminal in response to the output of said first comparison circuit,   a second switch coupling said second output to said common output terminal in response to the output of said second comparison circuit; and   a voltage converter coupled between said common output terminal and an output terminal of said stress mode circuit for providing an internal voltage to said output terminal and said first and second comparison circuits.   
     
     
       8. The circuit of claim 7 wherein at least one of said voltage generator circuits includes a voltage divider circuit. 
     
     
       9. The circuit of claim 7 wherein at least one of said comparison circuits includes a differential amplifier. 
     
     
       10. The circuit of claim 9 wherein said differential amplifier includes a plurality of transistors, at least one of which is coupled between at least two other transistors of said plurality to eliminate a large voltage drop across either of said at least two other transistors. 
     
     
       11. The circuit of claim 10 further including a power-up transistor coupled in parallel to said at least one transistor. 
     
     
       12. The circuit of claim 7 wherein at least one of said switches includes a transistor. 
     
     
       13. The circuit of claim 7 wherein said stress mode circuit is an integrated circuit. 
     
     
       14. A method to operate a stress mode circuit comprising the steps of: providing a power supply voltage to power a comparing circuit;   applying a reference voltage and another voltage derived from said power supply voltage and which has a voltage magnitude lower than a voltage magnitude of said power supply voltage to inputs of said comparing circuit;   in said comparing circuit, comparing said reference voltage to said another voltage for generating a plurality of control signals to control a plurality of corresponding switches based on results of the comparison within said comparing circuit;   selecting between said reference voltage and said another voltage and providing said selected voltage to a common output terminal based on said applying and comparison steps; and   converting said selected voltage into an internal voltage using a voltage converter and providing said internal voltage to an output terminal of said stress mode circuit and to said comparing circuit.   
     
     
       15. The method of claim 14 wherein said power supply voltage is an external power supply voltage, the method wherein the comparing step includes generating first and second output signals; and   said selecting step includes controlling first and second transistors each connected to said common output terminal.   
     
     
       16. The method of claim 15 wherein the comparing and generating at least one output steps include performing first and second comparisons and generating the first and second outputs based respectively thereon. 
     
     
       17. The method of claim 14 wherein said selecting step includes selecting and outputting a larger one of the another voltage and the reference voltage; wherein in a first range of power supply voltages where the reference voltage is larger than the another voltage, the internal voltage is based on the reference voltage,   and wherein in a second range of power supply voltages where the reference voltage is smaller than the another voltage, the internal voltage is based on the another voltage;   whereby variations in the power supply voltage that fall within said tint first range of voltages do not directly cause variations in the internal voltage.