US5590339AExpiredUtility
Input device interface with power connect state and serial data channel enabling power to the device from time to time
Est. expiryAug 23, 2013(expired)· nominal 20-yr term from priority
Inventors:Hershow Chang
H04N 1/3271H04N 1/32704H04N 1/00127H04N 1/00238H04N 1/32763H04N 1/32719
64
PatentIndex Score
25
Cited by
20
References
18
Claims
Abstract
An interface for connecting a local input device to a host, such as a telephone message receiving unit. The interface transfers data serially from the local input device to the telephone message receiving unit for print out or facsimile transmission thereby. Control of the interface is governed by a state machine having several states.
Claims
exact text as granted — not AI-modifiedI claim:
1. An interface between a host and an input device, comprising: a plurality of signal lines for connecting the input device to the host, including a power supply line, a data transmission line, a control signal transmitting line and a control signal receiving line; power supply in communication with said power supply line for supplying power over said power supply line to the input device; a data transmission channel coupled to said data transmission line for receiving data from the input device and for transferring the received data to the host; and control logic coupled to the host and said power supply for enabling the supply of power over said power supply line to the input device from time to time, and monitoring said control signal receiving line to maintain the supply of power until a time out occurs, or until a data transfer on said data transmission channel ends.
2. The apparatus of claim 1, further comprises: switch circuit coupled to a switch mounted externally to the host and to said control logic; wherein said control logic is responsive to activation of said switch to connect power to said power supply line.
3. The interface apparatus of claim 1, wherein said control logic includes: logic coupled to said control signal receiving line for monitoring said control signal receiving line to determine if an acknowledge signal is provided within a predefined time period by the input device in response to the supply of power to the input device over said power supply line which indicates a data transfer to be executed on said data transmission channel.
4. The apparatus of claim 3, further comprising: switch circuit coupled to a switch mounted external to the host and to said control logic; wherein said control logic is responsive to activation of said switch to connect power to said power supply line.
5. The apparatus of claim 4, wherein said control logic disables power supply to the power supply line if an acknowledge signal is not received over said control signal receiving line within a predefined time period.
6. An interface apparatus for connecting an input device to a host, comprising: a plurality of signal lines for connecting the input device to the host, including a power supply line, a control signal transmitting line, a control signal receiving line, a data receiving line and a clock line; control logic coupled to said plurality of signal lines for controlling the propagation of signals thereon; a state machine for driving operation of said control logic, said state machine including: a first state in which power on said power supply line is disabled; a second state, entered from time to time from the first state, in which power on said power supply line is enabled and said control signal receiving line is monitored for a signal indicating a presence of an input device, wherein control is transferred from said second state to said first state when said signal indicating the presence of an input device is not received within a predefined time period; a third state, entered into if the presence of an input device is indicated in the second state, in which a clock signal is generated on said clock line and a reset signal is propagated on said control signal transmitting line to the input device; a fourth state, entered into in response to a signal on said control signal receiving line indicating reset of the input device is complete, in which a host idle signal is transmitted on said control signal transmitting line and said control signal receiving line is monitored for an indication that a line of data is ready in the input device for transfer to the host; a fifth state, entered into when a line of data from the input device is ready for transfer, in which a signal enabling transfer is propagated over said control signal transmitting line; a sixth state, entered into upon propagation of said transfer enabling signal, in which data is received over said data receiving line from the input device; and a seventh state entered into upon completion of said data transfer or interruption thereof, in which control is transferred to said fifth state if a signal on said control signal receiving line indicates that another line of data is ready for transfer from the input device and further in which control is transferred to said first state upon the occurrence of certain predefined conditions.
7. The apparatus of claim 6, wherein control is transferred from said fourth state to said first state when said signal indicating that a line of data is ready for transfer from the input device is not received with a predefined time period.
8. The apparatus of claim 6, wherein control is transferred from said fifth state to said first state if said signal indicating a line of data is ready for transfer is removed from said control signal receiving line.
9. The apparatus of claim 6, wherein control is transferred from said sixth state to said first state when a signal is detected on said control signal receiving line indicating an interruption in transmission of a line of data from the input device.
10. The apparatus of claim 6, wherein control is transferred from said seventh state to said first state when said control logic detects an end of transfer command sent by the input device from which data is being transferred.
11. The apparatus of claim 6, wherein the control logic includes: logic coupled to said control signal transmitting line and said control signal receiving line that monitors during the fourth state, said control signal receiving line for a signal which indicates that a line of data is ready for transmission from the input device and enables said transmission in response thereto by propagating a send data signal on said control signal transmitting line; said control logic during said seventh state enters a wait state in which said control signal receiving line is monitored for a signal indicating that a next line of data is ready for transfer from the input device and enables said transmission of said next line of data in response thereto by propagating a send data signal on said control signal transmitting line; whereby entrance of said wait state during said seventh state permits the transfer of data between an input device that operates at a slower frequency than the host to which data is transferred.
12. An interface apparatus for connecting an input device to a host, comprising: a plurality of signal lines for connecting the input device to the host, including a control signal transmitting line, a control signal receiving line, a data line, and a clock line; a data transmission channel coupled to said data line for receiving both image data, in data lines of predetermined length, and command data from the input device and for transmission of said image data to the host; control logic for controlling propagation of signals on said plurality of signal lines; command logic coupled to said control logic that monitors a line of data transmitted on said data line to detect a predefined sequence of bits equal in length to said predetermined length and which indicates that command data follows said predefined sequence, and when said predefined sequence is detected to detect the command data following the predefined sequence.
13. The apparatus of claim 12, comprising: modifying logic for modifying the predefined length of said line of data, thereby modifying the number of cycles of said data clock required to transfer one line of data.
14. The apparatus of claim 12, comprising: serial to parallel shift register that receives data on said data transfer channel from an input device; and internal data bus in communication with said shift register and adapted for communication with a local system bus of the host, said internal data bus propagating data from said shift register to the host and to said shift register from the host; wherein said data transfer channel has a plurality of serial data lines coupled to said shift register for propagating color data.
15. The apparatus of claim 14, wherein said data transfer channel includes a black signal line, a cyan signal line, a yellow signal line and a magenta signal line.
16. The apparatus of claim 14, further comprises: a status register, in communication with control logic and adapted to be accessible by the host over said internal data bus, that indicates a status of data transfers from the input device to said shift register.
17. The apparatus of claim 16, wherein the toggling of a bit in said status register by the host causes said control logic to initiate a data transfer from the input device.
18. The apparatus of claim 14, further comprising: logic that detects command data propagated over said data transfer channel from the input device.Cited by (0)
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