Method and circuit arrangement for driving semiconductor switches in a series circuit

Abstract

In a method and a circuit arrangement for driving semiconductor switches in a series circuit, in which a voltage limiting device is assigned to each semiconductor switch, the power losses of the voltage limiting devices are detected by a control equipment for equalizing the voltage distribution across the semiconductor switches. The control equipment generates modified control pulses for each semiconductor switch from a common control pulse on the basis of the detected power losses of the voltage limiting devices. By this means, the power loss of the voltage limiting devices is controlled to a minimum.

What is claimed as new and desired to be secured by Letters Patent of the United States is: 
     
       1. A method for driving semiconductor switches connected in a series circuit by equalizing the voltage distribution across the semiconductor switches comprising the steps of: providing a voltage limiting device for each of said semiconductor switches, each voltage limiting device being connected between the collector and control electrode of the respective semiconductor switch;   detecting the amount of power loss from each of said voltage limiting devices and controlling said power loss to be at a minimum;   generating modified control pulses for controlling each semiconductor switch by means of control equipment, based on the receipt of a common control pulse and the detected power loss;   wherein said semiconductor switches are non-latching semiconductor switches.   
     
     
       2. The method as claimed in claim 1, wherein the control equipment is formed in each case by one control device per semiconductor switch. 
     
     
       3. The method as claimed in claim 1, wherein the power loss of the voltage limiting devices is controlled to zero. 
     
     
       4. The method as claimed in claim 1, wherein the modified control pulses are formed by time displacement of the switching edges of the control pulse. 
     
     
       5. The method as claimed in one of claims 1, wherein a short-circuit element is in each case connected in parallel with one semiconductor switch so that, in the event of exceeding a response threshold of the short-circuit element, which threshold is higher than the response threshold of the respective voltage limiting device, the short-circuit element accepts the current flow from the respective semiconductor switch. 
     
     
       6. The method as claimed in claim 2, wherein the power loss of the voltage limiting devices is controlled to zero.