Band gap current reference circuit

Abstract

A circuit for delivering an accurate reference current independent of operating frequency that is implementable on-chip and that is relatively insensitive to process and temperature variations. A frequency source controls a rate of charge transfer via a switched capacitor to generate a constant current over different frequencies. A complimentary doped FET provides a band gap voltage imposed over a known resistance to generate the output current.

What is claimed is: 
     
       1. A current reference circuit comprising: an NFET having its gate doped with impurities for increasing a voltage threshold of the NFET by about a band gap of silicon;   a PFET current mirror having a first one of its legs coupled to the NFET for providing a current flowing through the NFET;   an NFET current mirror coupled to a second leg of the PFET current mirror for controlling an amount of current provided by the PFET current mirror;   switching capacitor means coupled to the NFET and to the NFET current mirror such that an amount of increase of the NFET's threshold voltage generated by the impurity doping is applied across the switching capacitor means; and   the switching capacitor means including a switching capacitor, means for receiving an input frequency, and means for charging and discharging the switching capacitor in response to the input frequency received at the switching capacitor means, which charging and discharging of the switching capacitor produces a reference current flowing from the switching capacitor means into the NFET current mirror, said reference current for said controlling the amount of current provided by the PFET current mirror.   
     
     
       2. The current reference circuit of claim 1 wherein a current flowing through said second leg of the PFET mirror controls a current flowing through said first leg of the PFET mirror, said current flowing through the first leg of the PFET mirror for providing said current flowing through the NFET and for maintaining the increased threshold voltage of the NFET. 
     
     
       3. The current reference circuit of claim 1 wherein the increased threshold voltage controls an amount of charge transferred to the switching capacitor during charging of the switching capacitor and wherein the amount of charge, in turn, controls a magnitude of said reference current flowing from the switching capacitor means. 
     
     
       4. A reference current generator comprising: an FET having its gate doped with impurities of opposite polarity to that of its diffusions for increasing its threshold voltage by about a band gap of silicon;   a plurality of current mirrors including one of a first impurity type and one of a second impurity type, the current mirror of the second impurity type coupled to the FET for providing a current through the FET;   switching means including a switching capacitor, the switching means coupled to a frequency source;   the FET connected to the switching means for providing to the capacitor a voltage equal to about said increased threshold voltage for charging the capacitor; and   the current mirror of a first impurity type connected to the switching means for discharging the capacitor at a frequency determined by the frequency source and for outputting a reference current generated by said discharging the capacitor.   
     
     
       5. A circuit comprising: a second node;   a plurality of capacitors;   a plurality of switching means each including a capacitor and each coupled only to, and directly to, the first node, and to a frequency source for charging and discharging the capacitor at a rate controlled by a frequency of the frequency source; and   selection means coupled to the plurality of switching means for selecting at least a first one of the plurality of switching means to charge and discharge a capacitor included in said at least a first one of the plurality of switching means, the selection means including means for selecting a different one of the plurality of switching means to charge and discharge a capacitor included in said different one of the plurality of switching means.   
     
     
       6. The circuit of claim 5 wherein the selection means further includes deactivation means for deactivating unselected ones of the plurality of switching means concurrently with selecting said at least a first one of the plurality of switching means, and concurrently with selecting said different one of the plurality of switching means. 
     
     
       7. A current reference circuit comprising: a current mirror of a first impurity type;   a current mirror of a second impurity type;   a first transistor having its gate doped with impurities of opposite polarity than that of its other terminals such that the threshold voltage of the first transistor is increased, the first transistor coupled to the current mirror of the first impurity type for receiving a current therefrom and for generating a band gap voltage based on its increased threshold voltage;   a capacitor coupled to a switching means which, in turn, is coupled to the first transistor and to the current mirror of the second impurity type for alternately charging the capacitor to the band gap voltage and discharging the capacitor into the current mirror of the second impurity type, the switching means coupled to an input for receiving an input frequency; and   the capacitor and the switching means providing an average current to the current mirror of the second impurity type based on a combination of the input frequency and the band gap voltage.   
     
     
       8. A current reference circuit comprising: an NFET having its gate doped with impurities for raising a threshold of the NFET by about a band gap of silicon;   a PFET current mirror having a first one of its legs coupled to the NFET for providing a current flowing through the NFET;   an NFET current mirror coupled to a second leg of the PFET current mirror for controlling an amount of current flowing through the second leg of the PFET current mirror;   a resistor coupled to the NFET and to the NFET current mirror such that an amount of increase of the NFET's threshold voltage generated by the impurity doping is applied across the resistor for producing a reference current flowing from the resistor through the NFET current mirror.   
     
     
       9. The current reference circuit of claim 8 wherein a current flowing through said second leg of the PFET mirror controls a current flowing through said first leg of the PFET mirror, said current flowing through the first leg of the PFET mirror for providing said current flowing through the NFET and for maintaining the raised threshold voltage of the NFET. 
     
     
       10. A reference current generator comprising: an FET having its gate doped with impurities of opposite polarity to that of its diffusions for increasing its threshold voltage by about a band gap of silicon;   a plurality of current mirrors including one of a first impurity type and one of a second impurity type, said current mirror of a first impurity type coupled to the FET for providing a current through the FET and for maintaining the band gap voltage; and a resistance means coupled to the FET for generating a reference current proportional to the band gap voltage.   
     
     
       11. The generator according to claim 10 wherein the current mirror of a second impurity type is connected to the resistance means and to the current mirror of the first impurity type for receiving the reference current and for controlling a current flowing through the current mirror of the first impurity type in response to the reference current. 
     
     
       12. A method comprising the steps of: providing an FET having its gate doped with impurities of opposite polarity than its diffusion regions providing a current flowing through the FET;   isolating a difference in a threshold voltage of the FET produced by the doping with impurities of opposite polarity and the current flowing through the FET; and   imposing only said difference in the threshold voltage of the FET across a known resistance to generate a reference current corresponding to said difference in the threshold voltage divided by a magnitude of the known resistance.   
     
     
       13. Apparatus comprising: an input;   a first current mirror;   a second current mirror;   a first node;   a second node;   a first transistor coupled to the first node and to the first current mirror for establishing a first voltage at the first node, the first transistor having a gate doped with impurities of opposite polarity to that of its gate and source, said impurities of opposite polarity increasing the threshold voltage of the first transistor by an amount equal to about a band gap of silicon and increasing the first voltage established at the first node above a second voltage at the second node by the amount equal to about the band gap of silicon;   a second transistor coupled to the second node and to the second current mirror for controlling the second voltage at the second node; and   a variable impedance connected to the input, the first node, and the second node for establishing an impedance between the first node and the second node proportional to a first variable reference frequency received at the input and for providing a variable current flowing into the second node that is proportional to the impedance established between the first node and the second node and to a voltage magnitude difference between the first node and the second node.   
     
     
       14. The apparatus of claim 13, further comprising: a second input; and   a second variable impedance connected to the second input, the first node, and the second node for establishing a second impedance between the first node and the second node proportional to a second variable reference frequency, which is a compliment of the first reference frequency, received at the second input and for providing a second variable current flowing into the second node that is proportional to the impedances established between the first node and the second node and to the voltage magnitude difference between the first node and the second node.   
     
     
       15. The apparatus of claim 14, wherein the first and second variable impedances each comprise a capacitor and a switching means, the switching means for controllably charging and discharging the capacitor in response to the first and second variable reference frequencies, respectively, and wherein the discharging of the capacitor provides the variable current flowing into the second node. 
     
     
       16. The apparatus of claim 13, wherein the second current mirror is coupled to the first current mirror for controlling an amount of current flowing through the first current mirror.