Method and apparatus for regulated low voltage charge pump

Abstract

Generation of an output voltage (28) greater than that of a reference voltage (20) is accomplished using a self starting low voltage charge pump (10). A start-up clock circuit (12) comprising a ring oscillator (40) is used to generate a ting oscillator clock signal (63) which can be used allow the charge pump (10) to begin operation before an external clock signal (44) is available.

I claim: 
     
       1. A low voltage charge pump comprising: start-up clock circuit that produces a clock signal having a first clock phase and a second clock phase, and the start-up clock circuit operates from a supply voltage having a voltage difference of less than 2.6 volts between a voltage source and a common reference, wherein during a startup period the clock signal is produced without the presence of an external clock;   an output capacitor having a first terminal coupled to a reference voltage terminal, and a second terminal for providing an output voltage;   capacitance charge circuit comprising: a current limiting device operably coupled to receive the clock signal, a first charge signal, a current limiting input signal, and to provide a second charge signal, wherein the current limiting device controls a rate of change of the second charge signal based on the current limiting input signal and the first charge signal;   a charge circuit capacitor operably coupled to receive the second charge signal from the current limiting device, and to the second terminal of the output capacitor, wherein during the first clock phase the charge circuit capacitor is charged based on the second charge signal, and during the second clock phase the charge circuit capacitance is being discharged into the output capacitor to produce an output voltage; and     regulation circuit operably coupled to receive the output voltage, and to provide the first charge signal, wherein the regulation circuit controls a maximum value of the first charge signal such that the output voltage is regulated.   
     
     
       2. The low voltage charge pump of claim 1, wherein the start-up clock circuit further comprises a ring oscillator that produces a ring oscillator clock signal that functions as the clock signal. 
     
     
       3. The low voltage charge pump of claim 2, wherein the start-up clock circuit further comprises a frequency divider that divides the ring oscillator clock signal when the output voltage is at a predetermined threshold voltage range to produce a divider clock signal. 
     
     
       4. The low voltage charge pump of claim 1, wherein the start-up clock circuit further comprises a clock signal multiplexor operably coupled to the ring oscillator circuit, for providing a divided clock signal as the clock signal when a threshold control signal is in a first state, and the clock signal multiplexor provides the external clock signal as the clock signal when the threshold control signal is in a second state. 
     
     
       5. The low voltage charge pump of claim 4, wherein the threshold control signal is in the first state when the output voltage is less than a trip voltage and subsequently switches to the second state when the output voltage is greater that the trip voltage, or the external clock signal is valid. 
     
     
       6. The low voltage charge pump of claim 3, wherein the ring oscillator comprises a disable input which disables the ring oscillator. 
     
     
       7. The low voltage charge pump of claim 1 further comprises a supply voltage sensing circuit operably coupled to the capacitance charge circuit, wherein, when the supply voltage equals or exceeds the output voltage, the supply voltage sensing circuit produces a control signal that causes the capacitance charge circuit to couple the supply voltage to the output capacitor such that the output voltage is approximately equal to the supply voltage. 
     
     
       8. The low voltage charge pump of claim 1, wherein the regulation circuit further comprises a lag-lead compensator configuration. 
     
     
       9. The low voltage charge pump of claim 1, wherein the current limiting device limits current at a first rate when the output voltage is below a trip voltage, and second current value when the output voltage is above the trip voltage. 
     
     
       10. The low voltage charge pump of claim 1, wherein the regulation circuit further comprises a sigma-delta analog to digital converter. 
     
     
       11. A method for stepping up a low voltage source, the method comprising the steps of: a) receiving the low voltage source having a voltage having a voltage difference of less than 2.6 volts between a voltage source and a common reference;   b) generating a reference clock signal having a first clock phase and a second clock phase from the low voltage source, wherein the reference clock signal is generated without the assistance of an external clock;   c) charging a storage capacitor at a first charge level during the first clock phase from the low voltage power source;   d) transferring at least a portion of charge in the storage capacitor to an output capacitor during the second clock phase, for providing an output voltage;   e) replacing the reference clock signal with an externally received clock signal when a trip voltage is reached; and   f) regulating the output voltage to a desired voltage by controlling the first charge level.   
     
     
       12. The method of claim 11 for stepping up a low voltage source of claim 1, further comprising the step: g) limiting the rate at which the first charge level is asserted and deasscerted.   
     
     
       13. A low voltage charge pump comprising: a start-up clock circuit coupled to receive a supply voltage having a voltage difference of less than 2.6 volts between a voltage source and a common reference, a threshold control signal, and having a clock output for providing a variable clock signal having a first clock phase and a second clock phase, wherein the variable clock signal operates at a first frequency when the threshold control signal has a value below a threshold value, and at a second frequency when the threshold control signal has a value above a threshold value;   an output capacitor having a first terminal coupled to a reference voltage terminal, and a second terminal for providing an output voltage;   a capacitance charge circuit operably coupled to receive the clock signal, wherein, during the first clock phase, the capacitance charge circuit is being charged, and during the second clock phase, the capacitance charge circuit is being discharged into the output capacitor to produce an output voltage; and   a regulation circuit operably coupled to receive the output voltage, and providing the first charge signal, wherein the regulation circuit controls a maximum value of the first charge signal such that the output voltage is regulated.