Readout of pixel data from array of CCD image detectors

Abstract

In systems for reading pixel data from an array of horizontal m-bit rows of CCD image detectors, pixel data loaded in parallel from a row of the array into an m-bit shift register is transferred in parallel from the m-bit shift register into other data storage device(s) having a plurality of output ports and sensed by a plurality of output amplifiers respectively connected in parallel to the output ports of the other data storage device(s). In a parallel-output-serial-register system in which the m-bit serial shift register has n cells at one end of the m-bit shift register that respectively have n output ports and an output register having n cells respectively connected in parallel to the n output ports of the m-bit shift register, with a plurality of different cells of the output register respectively having output ports, the loaded pixel data is shifted through the shift register toward the n output ports thereof and the shifted pixel data is transferred in parallel from the n output ports of the shift register into the n cells of the output register for sensing by output amplifiers respectively connected to the output ports of the output register.

We claim: 
     
       1. A system for reading pixel data from an array of horizontal m-bit rows of CCD image detectors, comprising an m-bit serial shift register with n cells at one end of the m-bit shift register respectively having n output ports, wherein m and n are plural integers and m is greater than n;   means for loading pixel data in parallel from a row of the array into the m-bit shift register one row at a time;   means for shifting the loaded pixel data through the m-bit shift register toward the n output ports thereof;   an output register having n cells respectively connected in parallel to the n output ports of the m-bit shift register, with a plurality of different cells of the output register respectively having output ports;   a plurality of output amplifiers respectively connected in parallel to the output ports of the output register for sensing pixel data transferred to the output ports of the output register; and   means for transferring the shifted pixel data from the n output ports of the m-bit shift register into the n cells of the output register for sensing by the respective output amplifiers connected to the output ports of the output register.   
     
     
       2. A system according to claim 1, wherein each of the output register cells having an output port has the same pitch as the respective output amplifier connected to said output port. 
     
     
       3. A system according to claim 2, wherein the output register includes n/p segregated p-cell shift registers for registering the n bits of pixel data transferred thereto, with each of the p-cell shift registers having one of said output-register output ports at one end thereof, wherein p is an integer and n is a plural-integer multiple of p; wherein there are n/p of said output amplifiers respectfully coupled to the n/p output ports of the p-cell shift registers for sensing pixel data shifted to the output ports of the p-cell shift registers; and   wherein the system further comprises   means for shifting pixel data through the p-cell shift registers toward the respective output ports of the p-cell shift registers.   
     
     
       4. A system according to claim 1, wherein the output register includes n/p segregated p-cell shift registers for registering the n bits of pixel data transferred thereto, with each of the p-cell shift registers having one of said output-register output ports at one end thereof, wherein p is an integer and n is a plural-integer multiple of p; wherein there are n/p of said output amplifiers respectfully coupled to the n/p output ports of the p-cell shift registers for sensing pixel data shifted to the output ports of the p-cell shift registers; and   wherein the system further comprises means for shifting pixel data through the p-cell shift registers toward the respective output ports of the p-cell shift register.