Folded read-only memory

Abstract

In a "flat cell" read-only memory with a matrix of memory cells, each memory cell is a MOSFET of either a low threshold voltage, which can be turned on when accessed, or a high threshold voltage which cannot be turned on when accessed. Each memory cell is connected between two adjacent columns of local bit lines. These local bit lines are alternately connected to a upper bank selection switch which is connected to a main bit line, and a lower bank selection switch, which is connected to a main virtual ground line. Since these local bit lines are fabricated with diffusion layers which are resistive, the path length, hence the resistance, to access any memory cell in the matrix from the main bit line to the main virtual ground is made the same by this alternate, interdigital local bit line layout. Thus, the access time is made uniform. The layouts of two adjacent banks are mirrored, so that the bank selection switches of two adjacent banks can share a common selection line.

What is claimed is: 
     
       1. A read-only memory, comprising: a plurality of main bit lines;   a plurality of main virtual ground lines;   a plurality of banks of memory cells arranged in a matrix;   a first plurality of bank selection switches connected second alternate columns of local bits lines of said matrix and interleaved between said first alternate columns, to select together only one of said banks to be activated;   each one of said memory cells comprising a MOSFET connected between two adjacent columns of said local bit lines and having a low threshold to be conductive when accessed by not doping the substrate of said MOSFET and a high threshold voltage to be non-conductive when accessed by heavily doping the substrate of said MOSFET,   the gates of said memory cells on a same row being connected together to one of a plurality word lines,   only one of said memory cells being accessed when one of said word lines and two adjacent local bit lines are activated,   one of said two adjacent local bit lines being selected through one of said first plurality of bank selection switches to one of said main bit lines, and the other of said two adjacent local bit lines being selected through one of said second plurality of bank selection switches to one of said virtual ground lines,   wherein the layout of one bank of memory cells has a mirror layout of an adjacent bank so that said first plurality of bank selection switches of one bank and the first plurality of selection switches of an second bank are grouped together.   
     
     
       2. A read-only memory as described in claim 1, wherein said main bit line and said main virtual ground lines are interleaved columns. 
     
     
       3. A read-only memory as described in claim 2, wherein said word lines are fabricated with polycrystalline silicon. 
     
     
       4. A read-only memory as described in claim 2, wherein said word lines are fabricated with polycrystalline silicide. 
     
     
       5. A read-only memory as described in claim 1, wherein said local bit lines are fabricated with diffusion of impurities into a silicon substrate. 
     
     
       6. A read-only memory as described in claim 1, wherein each of said main bit lines is shared by two local bit lines, and each of main virtual ground lines is shared by two local bit lines. 
     
     
       7. A read-only memory as described in claim 1, wherein said first plurality of bank switches are controlled by another common bank selection word line. 
     
     
       8. A read-only memory as described in claim 7, wherein said common bank selection word line controls the first plurality of bank switches of two adjacent bank. 
     
     
       9. A read-only memory as described in claim 1, wherein said main bit lines and said main virtual ground line are fabricated with metal. 
     
     
       10. A read-only memory as described in claim 7, wherein said common bank word line is fabricated with polycrystalline silicon layer. 
     
     
       11. A read-only memory as described in claim 7, wherein said common bank word line is fabricated with polycrystalline silicide.