Semiconductor integrated circuit device equipped with protective system for directly discharging surge voltage from pad to discharge line

Abstract

A protective system incorporated in a semiconductor integrated circuit device has a shared discharging line and a plurality of protective circuits each having a diode and a lateral bipolar transistor coupled between an associated pad and the shared discharging line. Surge voltage applied to the pad is discharged through the associated protective circuit to the shared discharging line so that a main circuit is not destroyed by the surge voltage.

What is claimed is: 
     
       1. A semiconductor integrated circuit device constructed on a semiconductor chip, comprising: a) a main circuit having an input port for receiving an input signal, and responding to said input signal to produce an output signal;   b) an output circuit having an output port for transferring said output signal to outside of said semiconductor integrated circuit device;   c) a power supply system having a first power supply subsystem for supplying a first power voltage and a second power voltage to said main circuit and a second power supply subsystem for supplying said first power voltage and said second power voltage to said output circuit, said first power supply subsystem comprising a first power supply port and a second power supply port said second power supply subsystem comprising a third power supply port and a fourth power supply port, wherein said first power supply port and said second power supply port are electrically isolated from said third power supply port and said fourth power supply port; and   d) a protective system further comprising: d-1) a shared discharging line, and   d-2) a plurality of protective units wherein one protective unit is physically connected between said shared discharging line and each of said input port, said output port, said first power supply port, said third power supply port and said fourth power supply port, and each of said protective units is operative to discharge said surge voltage from said input port, said output port, said first power supply port, said third power supply port and said fourth power supply port to said shared discharging line.     
     
     
       2. The semiconductor integrated circuit device as set forth in claim 1, wherein said shared discharging line comprises a scribe line electrically connected with said semiconductor chip. 
     
     
       3. The semiconductor integrated circuit device as set forth in claim 1, wherein each of said protective units consists of a parallel combination of a diode and a clamping element, said diode having an anode connected with said shared discharging line and a cathode connected with the port associated with said protective unit, said clamping element allowing a positive surge voltage to flow from said associated port to said shared discharging line. 
     
     
       4. The semiconductor integrated circuit device as set forth in claim 3, said diode further comprising: a first impurity region having a first conductivity type electrically connected with an associated port; and   a first part of said semiconductor chip having a second conductivity type electrically connected with said shared discharging line, and   said clamping element further comprising: said first impurity region;   a second part of said semiconductor chips; and   a second impurity region having said first conductivity type spaced from said first impurity region by said second part of said semiconductor chip, wherein said second impurity region is electrically connected with said shared discharging line.     
     
     
       5. The semiconductor integrated circuit device of claim 1 wherein said protective units dissipate surge voltage to said shared discharging line when said main circuit is being operated. 
     
     
       6. A semiconductor integrated circuit device comprising: at least one each of an input terminal and an output terminal connected to at least one internal circuit,   a first power supply system;   a second power supply system;   a discharging line common to said input terminal, said output terminal, said first power supply system, and said second power supply system; and   a protective unit physically connected between each said input terminal and output terminal and said discharging line to dissipate excess charge to said discharging line when said internal circuit is being operated.   
     
     
       7. A semiconductor device comprising: a first power supply pad supplied with a power voltage;   a second power supply pad supplied with said power voltage;   a common discharging line;   a first protective unit connected at one end thereof to said common discharging line and at the other end thereof to said first power supply pad;   a second protective unit connected at one end thereof to said common discharging line and at the other end thereof to said second power supply pad;   a first internal wiring independent of said first and second protective units and connecting said first power supply pad to an internal circuit, and   a second internal wiring independent of said first and second protective units and connecting said second power supply pad to said internal circuit;   said first and second protective units respectively having protective elements serving as a minimum unit for achieving a protective function by dissipating excess charge to said common discharging line when said internal circuit is being operated, said protective elements being connected between said one end and said other end of respective protective units without another protective element.   
     
     
       8. The semiconductor device as set forth in claim 7, in which each of said first and second protective units consists of a clamping element and a diode element, each of said clamping element and said diode element connected between said one end and said other end of respective protective units. 
     
     
       9. The semiconductor device of claim 7, wherein each of said first and second internal wirings is independent of said internal circuit. 
     
     
       10. A semiconductor device comprising: an internal circuit;   a plurality of pads;   a plurality of internal wirings connecting said plurality of pads to said internal circuit, respectively;   a common discharging line formed in an area different from another area assigned to said internal circuit and yet another area assigned to said plurality of internal wirings; and   a plurality of protective circuits connected between said common discharging line and said plurality of pads, respectively, to achieve a protective function by dissipating excess charge to said common discharging line when said internal circuit is being operated.   
     
     
       11. The semiconductor device as set forth in claim 10, in which each of said plurality of protective circuits includes a protective element serving as a minimum unit for achieving a protective function, and said protective element is connected between said common discharging line and said respective pad without another protective element. 
     
     
       12. The semiconductor device as set forth in claim 10, in which said common discharging line is implemented by a scribe wiring. 
     
     
       13. The semiconductor device as set forth in claim 10, in which said plurality of pads includes at least a first power supply pad supplied with a power voltage and a second power supply pad supplied with said power voltage. 
     
     
       14. A semiconductor device comprising: a common discharging line forming a closed loop;   an internal circuit formed inside of said closed loop;   a plurality of pads provided between said internal circuit and said common discharging line;   a plurality of electrostatic protective means respectively connecting said plurality of pads to said common discharging line to achieve a protective function by dissipating excess charge to said common discharging line when said internal circuit is being operated; and   a plurality of internal wirings respectively connecting said plurality of pads to said internal circuit.   
     
     
       15. The semiconductor device as set forth in claim 14, in which said common discharging line is implemented by a scribe wiring arranged in the peripheral portion of a chip.