ATM line card and method for transferring connection memory data

Abstract

An ATM line card is provided wherein a microprocessor bus is selectively coupled to a memory bus during maintenance time intervals. This allows direct transfer of connection memory data to the microprocessor system of the line card and thus to the RAM of the system. After the transfer is accomplished the busses are decoupled again so that further maintenance work of the connection memory and the transferred data can be done independently. If the access to the connection memory is due to a destructive read operation the corresponding memory locations in the connection memory are reset simultaneous to the transfer of the data which are read out from the DMA of the microprocessor system to the RAM. This results in a dramatic reduction of the time required for maintenance of the ATM system.

What is claimed is: 
     
       1. An ATM line card comprising a) cell processor means for establishing a number of virtual connections;   b) connection memory means for storage of processing data of said virtual connections, said connection memory means being coupled to said cell processor means via a memory bus means;   c) microprocessor means being coupled to microprocessor bus means;   d) said cell processor means comprising control means for selectively coupling said memory bus means to said microprocessor bus means during a time interval when said cell processor does not effect cell transfers via said virtual connections.   
     
     
       2. The ATM line card of claim 1 said control means being adapted to receive an access request to data stored in said connection memory from said processor means, said access request specifying whether said data to be accessed is to be erased or not, whereby said control means decouples said memory bus means and said microprocessor bus means after said access is accomplished and subsequently erases said data via said memory bus. 
     
     
       3. The ATM line card of claim 2 said ATM line card further comprising random access memory means and direct memory access means; said random access memory means and said direct memory access means being coupled to said microprocessor bus means, said control means being adapted to issue a request to said direct memory access means in response to said access request of said processor means, so that said direct memory access means is granted access to said processor bus.   
     
     
       4. The ATM line card of claim 1 the physical address space of said connection memory means being mapped by said control means into a first address space for normal access requests and a second address space for access requests in response to which said data is to be erased. 
     
     
       5. An ATM switch comprising a plurality of ATM line cards according to claim 1. 
     
     
       6. A method for selectively coupling a microprocessor system to connection memory means, said connection memory means being adapted to store processing data of virtual connections established by ATM cell processor means, said method comprising the steps of: a) buffering of input cells for said cell processor means;   b) processing said cells in said cell processor means at a rate which higher than a line rate;   c) coupling memory bus means of said connection memory means to microprocessor bus means of said microprocessor system during a time interval when said cell processor does not effect cell transfers via said virtual connections.   
     
     
       7. A method for transferring data from connection memory means to random access memory means, said connection memory means being adapted to store processing data of virtual connections established by means of an ATM line card, said method comprising the steps of: a) issuing an access request to data stored in said connection memory means, said access request specifying whether said data to be accesses is to be erased or not;   b) coupling memory bus means of said connection memory means to microprocessor bus means of an microprocessor system comprising said random access memory means during a time interval when said cell processor does not effect cell transfers via said virtual connections;   c) transferring said data via said coupled memory bus means and microprocessor bus means;   d) decoupling said coupled memory bus means and microprocessor bus means;   e) in case that said access request specifies that said accessed data is to be erased: Erasing said accessed data in said connection memory means.   
     
     
       8. The method of claim 7 whereby simultaneously to said step of erasing said accessed data said accessed data is transferred from direct memory access means of said microprocessor system to said random access memory means.