Os rectifying Schottky and ohmic junction and W/WC/TiC ohmic contacts on SiC

Abstract

Metallic osmium on SiC (either β or α)forms a contact that remains firmly attached to the SiC surface and forms an effective barrier against diffusion from the conductive metal. On n-type SiC, Os forms an abrupt Schottky rectifying junction having essentially unchanged operating characteristics to at least 1050° C. and Schottky diodes that remain operable to 1175° C. and a barrier height over 1.5 ev. On p-type SiC, Os forms an ohmic contact with specific contact resistance of <10 -4 ohm-cm 2 . Ohmic and rectifying contacts to a TiC layer on a SiC substrate are formed by depositing a WC layer over the TiC layer, followed by a metallic W layer. Such contacts are stable to at least 1150° C. Electrodes connect to the contacts either directly or via a protective bonding layer such as Pt or PtAu alloy.

We claim: 
     
       1. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer comprising metallic osmium (Os) contacting the first surface to form a first contact having an electronic interface to the first doped region; and   a second conductive layer comprising a metal contacting the second surface to form a second electronic contact to the second doped region.   
     
     
       2. A SiC semiconductor device according to claim 1 in which the first and second doped regions are doped n-type, the first contact forms a Schottky junction and the second contact forms an ohmic junction. 
     
     
       3. A SiC semiconductor device according to claim 2 in which the first and second doped regions and intervening portions of the substrate are doped n-type, the first contact forms a Schottky junction and the second contact forms an ohmic junction, so that the device acts as a Schottky diode. 
     
     
       4. A SiC semiconductor device according to claim 1 in which the first and second regions are doped to a first dopant type and an intervening portion of the substrate is doped to an opposite dopant type to form a first pn junction at an interface adjoining the first region and a second pn junction at an interface adjoining the second region. 
     
     
       5. A SiC semiconductor device according to claim 1 in which the first region is doped to a first dopant type and the second region is doped to a second, opposite dopant type, and an intervening portion of the substrate is doped to form a first pn junction at an interface adjoining the first region, a second pn junction at an interface adjoining the second region and a third pn junction within the intervening portion. 
     
     
       6. A SiC semiconductor device according to claim 1 including a layer of a protective metal covering the Os first conductive layer, selected from a group of conductive metals that is protective of the Os layer against oxidation and adapted to bond to an osmium surface. 
     
     
       7. A SiC semiconductor device according to claim 1 including a layer of a protective metal selected from a group consisting of Pt, Pd, W, Au, PtAu, Ti, Zr, Hf, V, Cr. Fe, Ni, Cu, Nb, Mo, Tc, Ru, Rh, Ag, Ta, Re, Ir. 
     
     
       8. A SiC semiconductor device according to claim 1 in which the second conductive layer comprises metallic osmium (Os). 
     
     
       9. A SiC semiconductor device according to claim 8 in which the first and second regions and intervening portions of the substrate are doped p-type so that the first contact and the second contact each form an ohmic junction and the device acts as a resistive device. 
     
     
       10. A SiC semiconductor device according to claim 8 in which the first and second regions and an intervening portion of the substrate are doped p-type so that the first contact and the second contact each form an ohmic junction and a gate structure contacts a third surface portion contacting the intervening portion of the substrate so that the device acts as field effect transistor. 
     
     
       11. A SiC semiconductor device according to claim 8 in which the first and second regions of the substrate are doped p-type so that the first contact and the second contact each form an ohmic. junction, and an intervening portion of the substrate is doped n-type to form a pn junction with at least one of said first and second regions. 
     
     
       12. A SiC semiconductor device according to claim 8 including a contact coupled to an intervening portion of the substrate so that the device acts as a transistor. 
     
     
       13. A SiC semiconductor device according to claim 12 in which the first and second regions are doped p-type and the intervening portion is doped n-type and contact coupled to the intervening portion comprises a material which forms an ohmic contact therewith so that the device is operable as a bipolar transistor. 
     
     
       14. A SiC semiconductor device according to claim 12 in which the first and second regions are doped p-type and the contact coupled to the intervening portion includes a third metallic layer overlying an insulative layer to form an insulated gate over the intervening portion so that the device is operable as a field effect transistor. 
     
     
       15. A SiC semiconductor device according to claim 14 in which the third conductive layer includes an Os layer. 
     
     
       16. A SiC semiconductor device according to claim 14 in which the third conductive layer includes: a titanium carbide (TiC) layer covering the insulative layer;   a tungsten carbide (WC) layer covering the titanium carbide (TiC) layer; and   a layer consisting essentially of elemental tungsten contacting the tungsten carbide (WC) layer.   
     
     
       17. A SiC semiconductor device according to claim 12 in which the first and second regions are doped p-type and the contact coupled to the intervening portion includes a conductive layer contacting a surface of the intervening portion so that the device is operable as a transistor. 
     
     
       18. A SiC semiconductor device according to claim 17 in which the contact coupled to the intervening portion includes: a titanium carbide (TiC) layer contacting the surface of the intervening portion;   a tungsten carbide (WC) layer covering the titanium carbide (TiC) layer; and   a layer consisting essentially of elemental tungsten contacting the tungsten carbide (WC) layer;   the intervening layer being doped p-type so that the device is operable as a transistor.   
     
     
       19. A SiC semiconductor device according to claim 17 in which the contact coupled to the intervening portion includes an Os layer contacting the surface of the intervening portion. 
     
     
       20. A SiC semiconductor device according to claim 1 in which the second conductive layer includes: a titanium carbide (TiC) layer on the second surface;   a tungsten carbide (WC) layer on the titanium carbide (TiC) layer; and   a metallic tungsten (W) layer on the tungsten carbide (WC) layer.   
     
     
       21. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer comprising metallic osmium (Os) contacting the first surface to form a first contact having an electronic interface to the first doped region; and   a second conductive layer comprising a metal contacting the second surface to form a second electronic contact to the second doped region;   the first region doped n-type and the first contact forming a Schottky junction as said electronic interface.   
     
     
       22. A SiC semiconductor device according to claim 21 in which the first conductive layer includes a thin film of Si or OsSi interfacing the metallic osmium to the first surface of the silicon carbide substrate. 
     
     
       23. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer comprising metallic osmium (Os) contacting the first surface to form a first contact having an electronic interface to the first region; and   a second conductive layer comprising a metal contacting the second surface to form a second electronic contact to the second doped region;   the first region doped p-type and the first contact forming an ohmic junction as said electronic interface.   
     
     
       24. A SiC semiconductor device according to claim 23 in which the second region is doped n-type, to form a pn junction at an interface between said regions. 
     
     
       25. A SiC semiconductor device according to claim 24 in which the second layer includes: a titanium carbide (TiC) layer contacting the second surface;   a tungsten carbide (WC) layer covering the titanium carbide (TiC) layer; and   a layer consisting essentially of elemental tungsten contacting the tungsten carbide (WC) layer.   
     
     
       26. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer comprising a first contact metal layer on the first surface to form a first contact having an electronic interface to the first doped region; and   a second conductive layer contacting the second surface to form a second electronic contact to the second doped region of the substrate, the second conductive layer including: a titanium carbide (TiC) layer contacting the second surface;   a tungsten carbide (WC) layer covering the titanium carbide (TiC) layer; and   a layer consisting essentially of elemental tungsten contacting the tungsten carbide (WC) layer.     
     
     
       27. A SiC semiconductor device according to claim 26 in which the second region is doped n-type, and the second contact forms an ohmic junction. 
     
     
       28. A SiC semiconductor device according to claim 26 including a layer of a bonding metal contacting the tungsten layer, selected from a group of conductive metals that is adapted to bond to a tungsten surface. 
     
     
       29. A SiC semiconductor device according to claim 26 including a layer of a bonding metal contacting the tungsten layer, the bonding metal being selected from a group consisting of Pt, Pd, W, Au, PtAu, V, Ti, Zr, Hf, Cr, Fe, Ni, Cu, Nb, Mo, Tc, Ru, Rh, Ag, Ta, Re, Ir. 
     
     
       30. A SiC semiconductor device according to claim 26 in which the second region is doped p-type, and the second contact forms a rectifying junction. 
     
     
       31. A SiC semiconductor device according to claim 26 in which the first conductive layer includes: a titanium carbide (TiC) layer on the first surface;   a tungsten carbide (WC) layer on the titanium carbide (TiC) layer; and   a metallic tungsten (W) layer on the tungsten carbide (WC) layer.   
     
     
       32. A SiC semiconductor device according to claim 31 in which the first and second regions and intervening portions of the substrate are doped n-type so that the first contacts and the second contact each form an ohmic junction and the device acts as a resistive device. 
     
     
       33. A SiC semiconductor device according to claim 31 in which the first and second regions are doped n-type and a contact is coupled to an intervening portion of the substrate, the contact including a third conductive layer overlying an insulative layer to form an insulated gate over the intervening portion so that the device is operable as a field effect transistor. 
     
     
       34. A SiC semiconductor device according to claim 33 in which the conductive layer overlying the insulative layer includes: a titanium carbide (TiC) layer on the insulative surface;   a tungsten carbide (WC) layer on the titanium carbide (TiC) layer; and   a metallic tungsten (W) layer on the tungsten carbide (WC) layer.   
     
     
       35. A SiC semiconductor device according to claim 33 in which the conductive layer overlying the insulative layer includes a layer of Os contacting the insulative layer. 
     
     
       36. A SiC semiconductor device according to claim 31 in which the first and second regions are doped n-type and a contact is coupled to an intervening portion of the substrate, the contact including a conductive layer contacting a surface of the intervening portion so that the device is operable as a transistor. 
     
     
       37. A SiC semiconductor device according to claim 36 in which the conductive layer includes: a titanium carbide (TiC) layer on the surface of the intervening portion;   a tungsten carbide (WC) layer on the titanium carbide (TiC) layer; and   a metallic tungsten (W) layer on the tungsten carbide (WC) layer.   
     
     
       38. A SiC semiconductor device according to claim 36 in which the conductive layer includes a layer of Os contacting the surface of the intervening portion. 
     
     
       39. A SiC semiconductor device according to claim 36 in which the intervening portion of the substrate is doped p-type so that the device is operable as a bipolar transistor. 
     
     
       40. A SiC semiconductor device according to claim 36 in which the intervening portion of the substrate is doped n-type so that the device is operable as a MESFET. 
     
     
       41. A SiC semiconductor device according to claim 40 in which the contact contacting a surface of the intervening portion comprises an Os layer. 
     
     
       42. A SiC semiconductor device according to claim 31 including a contact coupled to an intervening portion of the substrate so that the device acts as a transistor. 
     
     
       43. A SiC semiconductor device according to claim 42 in which the gate contact material includes a third conductive layer overlying an insulative layer to form an insulated gate over the intervening portion so that the device acts as a field effect transistor. 
     
     
       44. A SiC semiconductor device according to claim 26 in which the first region is doped p-type and the first conductive layer is formed of a material suitable to form an ohmic contact with the first region, the second region is doped n-type to form an ohmic contact to the second conductive layer, and the substrate includes a first n-type intervening portion adjoining the first region and a second p-type intervening portion adjoining the second region of the substrate so as to define a four-layer device having three pn junctions electrically coupled between said first and second conductive layers. 
     
     
       45. A SiC semiconductor device according to claim 44 in which the first doped conductive layer comprises an Os layer contacting the first region. 
     
     
       46. A SiC semiconductor device according to claim 44 including a third conductive layer contacting a surface of one of the intervening portions. 
     
     
       47. A SiC semiconductor device according to claim 46 in which the third conductive layer comprises one of an Os layer and a TiC/WC/W layer. 
     
     
       48. A SiC semiconductor device according to claim 44 in the third conductive layer is capacitively coupled to a surface of one of the intervening portions. 
     
     
       49. A SiC semiconductor device according to claim 48 in which the third conductive layer comprises one of an Os layer and a TiC/WC/W layer. 
     
     
       50. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer comprising metallic osmium (Os) contacting the first surface to form a first contact having an electronic interface to the first doped region; and   a second conductive layer comprising a metal contacting the second surface to form a second electronic contact to the second doped region;   the device being operative to support electrical conduction in at least one direction between the contacts through the first and second doped regions via the electronic interface.   
     
     
       51. A SiC semiconductor device according to claim 50 in which the first doped region includes a portion consisting essentially of p-type SiC so that the electronic interface supports bidirectional electrical conduction between the first contact and the substrate. 
     
     
       52. A SiC semiconductor device according to claim 50 in which the first doped region includes a portion consisting essentially of n-type SiC so that the electronic interface supports unidirectional electrical conduction between the first contact and the substrate. 
     
     
       53. A SiC semiconductor device comprising: a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;   a first conductive layer consisting essentially of metallic osmium (Os) contacting the first surface to form a first contact having an electronic interface to the first doped region; and   a second conductive layer comprising a metal contacting the second surface to form a second electronic contact to the second doped region.   
     
     
       54. A SiC semiconductor device according to claim 50 in which the first and second doped regions consist essentially of p-type SiC and the second contact consists essentially of metallic osmium (Os).