Noise eliminating bus receiver

Abstract

There is provided a bus receiver including a first differential amplifier comparing an input signal to a first reference voltage, and transmitting a first pulse signal accordingly, a second differential amplifier comparing the input signal to a second reference voltage, and transmitting a second pulse signal accordingly, an exclusive OR circuit transmitting an exclusive OR pulse signal indicative of exclusive OR of the first and second pulse signals, a first flip-flop circuit receiving the exclusive OR pulse signal as clock, and receiving the second pulse signal as data, and a selector selecting one of the first and second pulse signals in accordance with an output of the first flip-flop circuit. The bus receiver readily eliminates noises. The bus receiver may further include a second flip-flop circuit receiving external clock as clock, and receiving an output of the selector as data. The provision of the second flip-flop circuit ensures that the bus receiver can be readily synchronized with other circuits electrically connected to the bus receiver and designed to operate under the same external clocks as those for the bus receiver.

What is claimed is: 
     
       1. A bus receiver comprising: (a) a first differential amplifier comparing an input signal to a first reference voltage, and transmitting a first pulse signal accordingly;   (b) a second differential amplifier comparing said input signal to a second reference voltage, and transmitting a second pulse signal accordingly;   (c) an exclusive OR circuit transmitting an exclusive OR pulse signal indicative of exclusive OR of said first and second pulse signals;   (d) a first flip-flop circuit receiving said exclusive OR pulse signal as clock, and receiving said second pulse signal as data; and   (e) a selector selecting one of said first and second pulse signals in accordance with an output of said first flip-flop circuit.   
     
     
       2. A bus receiver comprising: (a) a first differential amplifier comparing an input signal to a first reference voltage, and transmitting a first pulse signal accordingly;   (b) a second differential amplifier comparing said input signal to a second reference voltage, and transmitting a second pulse signal accordingly;   (c) an exclusive OR circuit transmitting an exclusive OR pulse signal indicative of exclusive OR of said first and second pulse signals;   (d) a first flip-flop circuit receiving said exclusive OR pulse signal as clock, and receiving said second pulse signal as data;   (e) a selector selecting one of said first and second pulse signals in accordance with an output of said first flip-flop circuit; and   (f) a second flip-flop circuit receiving external clock as clock, and receiving an output of said selector as data.   
     
     
       3. A method of eliminating noise from signals, comprising the steps of: (a) comparing an input to a first reference voltage to thereby obtain a first difference therebetween;   (b) comparing said input to a second reference voltage to thereby obtain a second difference therebetween;   (c) calculating exclusive OR of said first and second differences;   (d) carrying out flip-flop operation between said exclusive OR and said second difference; and   (e) selecting one of said first and second differences in accordance with a result of said step (d).   
     
     
       4. A method of eliminating noise from signals, comprising the steps of: (a) comparing an input to a first reference voltage to thereby obtain a first difference therebetween;   (b) comparing said input to a second reference voltage to thereby obtain a second difference therebetween;   (c) calculating exclusive OR of said first and second differences;   (d) carrying out flip-flop operation between said exclusive OR and said second difference;   (e) selecting one of said first and second differences in accordance with a result of said step (d); and   (f) carrying out second flip-flop operation between external clock and a difference selected in said step (e) between said first and second differences.