Method and apparatus for using back EMF to control a motor

Abstract

A circuit to control a motor having phase inputs. A respective control signal for each phase input of the motor is generated such that each phase input is cyclically driven and undriven. Additionally, changes at each phase input relative to a reference potential are measured, and changes at each phase input during time intervals in which noise is expected are ignored: timing information based on the measured changes at the phase inputs is generated, and timing information to carry out the step of generating a respective control signal is used.

What is claimed is: 
     
       1. An apparatus for controlling a motor having a plurality of phase inputs, comprising: a drive circuit that has a plurality of phase outputs and that is operative to control each of said phase outputs according to a predetermined sequence of driven and undriven states; and   a control circuit operative to provide timing information to said drive circuit in response to a signal at each phase output, said control circuit being operative to be nonresponsive to the signal at each said phase output during predetermined time intervals of the predetermined sequence.   
     
     
       2. The apparatus of claim 1, wherein each said phase output is cyclically driven and undriven during respective successive first and second time intervals, the second time interval for each said phase output being offset in time from the second time interval for each of the other phase outputs. 
     
     
       3. The apparatus of claim 1, wherein each said phase output is cyclically driven and undriven during respective successive first and second time intervals, the second time interval for each said phase output being offset in time from the second time interval for each of the other phase outputs, said control circuit being nonresponsive to each of said phase output of said drive circuit during a predetermined portion of the first time interval of that particular phase output. 
     
     
       4. The apparatus of claim 1, wherein each said phase output is cyclically driven and undriven during respective successive first and second time intervals, the second time interval for each said phase output being offset in time from the second time interval for each of the other phase outputs, said control circuit ignoring each said phase output of said drive circuit during a predetermined portion of the second time interval of that particular phase output. 
     
     
       5. The apparatus of claim 1, wherein said control circuit ignores each said phase output during predetermined time intervals when noise is expected at that particular phase output. 
     
     
       6. The apparatus of claim 1, wherein said control circuit comprises a plurality of comparators, each comparator coupled to one of the phase outputs, each comparator being operable to compare the signal at the phase output to a reference potential, each comparator being further operable to generate a respective comparator output signal, each comparator being further operable to modify the respective comparator output signal in response to comparing the signal at the phase output to the reference potential. 
     
     
       7. The apparatus of claim 1, wherein said control circuit comprises a plurality of comparators, each comparator coupled to one of the phase outputs, each comparator being operable to compare the signal at the phase output to a reference potential, each comparator being further operable to generate a respective comparator output signal, each comparator being further operable to modify the respective comparator output signal in response to comparing the signal at the phase output to the reference potential; and wherein said control circuit further comprises a detection circuit that is operative to latch the comparator output signal of one of the comparators during time intervals when interference is expected that is associated with the phase output coupled to that comparator.   
     
     
       8. The apparatus of claim 1, wherein said control circuit comprises a plurality of comparators, each comparator coupled to one of the phase outputs, each comparator being operable to compare the signal at the phase output to a reference potential, each comparator being further operable to generate a respective comparator output signal, each comparator being further operable to modify the respective comparator output signal in response to comparing the signal at the phase output to the reference potential; and wherein said control circuit further comprises a detection circuit that is operative to generate a detection signal in response to each of the comparator output signals, each detection signal ignoring changes to the comparator output signal that the detection signal responds to during time intervals when noise is expected, the timing information generated by the control circuit in response to the detection signals.   
     
     
       9. A method of controlling a motor having a plurality of phase inputs, comprising: generating a respective control signal for each phase input of the motor such that each phase input is cyclically driven and undriven;   measuring changes at each phase input relative to a reference potential;   being nonresponsive to changes at each phase input during time intervals in which noise is expected;   generating timing information based on the measaured changes at the phase inputs; and   utilizing the timing information to carry out said step of generating a respective control signal.   
     
     
       10. The method of claim 9, wherein said step of measuring changes at each phase input includes modifying a comparator output signal each time the potential at a phase input equals the reference potential. 
     
     
       11. The method of claim 9, wherein said step of not responding to changes at each phase input includes identifying predetermined time intervals where noise associated with the switching of phase inputs is expected. 
     
     
       12. The method of claim 9, wherein said step of measuring changes at each phase input includes modifying a comparator output signal each time the potential at a phase input equals the reference potential; and wherein said step of not responding to changes at each phase input includes ignoring modifications to the comparator output signal during time intervals when noise is expected.   
     
     
       13. The method of claim 9, wherein said step of measuring changes at each phase output includes modifying a comparator output signal each time the potential at a phase input equals the reference potential; and wherein said step of not responding to changes at each phase input includes latching the comparator output signal during time intervals in which change to the comparator output signal is expected as a result of noise.   
     
     
       14. The method of claim 9, wherein said step of not responding to changes at each phase input includes identifying time intervals in which noise is expected due to commutation of the phase inputs. 
     
     
       15. The method of claim 9, wherein said step of not responding to changes at each phase input includes identifying time intervals in which noise is expected due to pulse width modulation of the phase inputs. 
     
     
       16. A motor control system comprising: a spindle drive motor having a plurality of coils;   a driver coupled to said spindle drive motor, said driver being operable to apply phase input signals to said coils of said spindle drive motor, the phase input signals being operable to cause each said coil to be cyclically in driven and undriven states; and   a control circuit coupled to said spindle drive motor and said driver, said control circuit being operable to measure a change in electric potential at each said coil relative to a reference potential, said control circuit being further operable to not respond to the change in electric potential during predetermined time intervals in which noise is expected, said control circuit being operative to send timing information to the driver based on the measured changes in electric potential.   
     
     
       17. The motor control system of claim 16, wherein said control circuit comprises a comparator that is operative to modify a comparator output signal each time the electric potential equals the common potential. 
     
     
       18. The motor control system of claim 16, wherein said control circuit comprises a logic component that is operative to generate an interference indicator during predetermined time intervals where noise associated with switching of the phase inputs is predicted. 
     
     
       19. The motor control system of claim 16, wherein said control circuit comprises a comparator that is operative to modify a comparator output signal each time the electric potential equals the common potential; wherein said control circuit further comprises a logic component that is operative to generate an interference indicator during predetermined time intervals where noise associated with switching of the phase inputs is predicted; and   wherein said control circuit further comprises a detection circuit that is operative to generate a detection signal in response to the comparator output signal, the detection circuit being further operable to ignore modifications to the comparator output signal in response to the interference indicator, the timing information being generated by the logic component in response to the detection signal.   
     
     
       20. The motor control system of claim 16, wherein the timing information is utilized by said driver to control the application of the phase inputs.