Programming method for nonvolatile memories

Abstract

A programming method for a floating gate memory circuit (100) includes a block erase (step 81) in which a first programming signal is applied to memory cells of a selected block of the memory to store a first value of charge in the memory cells of the block. Data is programmed by applying a second programming signal to a first memory cell to store a second value in the first memory cell (step 83). A third programming signal is applied to a second memory cell to write a correction charge that compensates for a change in the first value of charge induced by the second programming signal (step 84).

We claim: 
     
       1. A method of programming a memory, comprising the steps of: writing to the memory with a first programming signal to store a first value as a stored charge in a first storage element of the memory, and to store the first value in a second storage element of the memory;   writing to the memory with a second programming signal to store a second value in the second storage element; and   writing to the first storage element with a third programming signal to store a correction charge to compensate for a change in the stored charge induced by the second programming signal.   
     
     
       2. The method of claim 1, further comprising the step of selecting the first and second storage elements with an address signal. 
     
     
       3. The method of claim 1, wherein the step of writing to the memory with the first programming signal includes the step of block erasing the memory with the first programming signal. 
     
     
       4. The method of claim 3, wherein the step of writing to the memory includes the step of accumulating the stored charge on a floating gate of the first storage element. 
     
     
       5. The method of claim 1 wherein the step of writing to the memory with a second programming signal includes the step of storing a second value different from the first value in the second storage element. 
     
     
       6. The method of claim 5 wherein the step of writing to the first storage element with a third programming signal includes the step of storing a correction charge in the first storage element to compensate for the change in the first stored charge. 
     
     
       7. The method of claim 1, further comprising the step of generating the third programming signal to have an amplitude less than an amplitude of the first programming signal. 
     
     
       8. A method of programming a memory, comprising the steps of: erasing memory cells of the memory with a first programming signal to store a first value of charge in the memory cells;   writing a first memory cell with a second programming signal to store a second value of charge in the first memory cell, where the second value is different from the first value; and   writing a correction charge into a second memory cell with a third programming signal to compensate for a difference between the first value of charge and a current value of charge stored in the second memory cell.   
     
     
       9. The method of claim 8, further comprising the step of addressing the memory to select the first and second memory cells. 
     
     
       10. The method of claim 8, wherein the step of erasing includes the step of storing the first value of charge on floating gates of the first and second memory cells. 
     
     
       11. The method of claim 8, wherein the second programming signal induces a current that alters the first value of charge stored in the second memory cell to produce the current value of charge stored in the second memory cell. 
     
     
       12. A method of programming a memory, comprising the steps of: storing a first value in memory cells of the memory with a first programming signal;   storing a second value in a first memory cell of the memory with a second programming signal, where the second value is different from the first value; and   storing a correction value in a second memory cell of the memory with a third programming signal to adjust for a change in a value stored in the second memory cell produced by the second programming signal.   
     
     
       13. The method of claim 12, wherein the step of storing a first value includes the step of storing a first charge on a floating gate of the first memory cell. 
     
     
       14. The method of claim 13, wherein the step of storing the second value includes the step of storing the second charge on a floating gate of the first memory cell. 
     
     
       15. The method of claim 14, wherein the step of storing a correction value includes the step of storing the correction charge on the floating gate of the second memory cell. 
     
     
       16. The method of claim 15, wherein the step of storing a second value includes the step of inducing a charge transfer in the second memory cell with the second programming signal. 
     
     
       17. The method of claim 12, wherein the step of storing a first value includes the step of erasing the memory cells of the memory. 
     
     
       18. The method of claim 17, wherein the step of erasing includes the step of concurrently erasing the first and second memory cells with the first programming signal.