Apparatus for detecting and averaging data in a digital data stream

Abstract

An apparatus for averaging pulses in a stream of pulses, which pulses are categorizable into at least two categories, includes structure for isolating the pulses into groupings of pulses, structure for counting the number of pulses of a particular category that occur within a grouping of pulses, and structure for generating an output signal when a predetermined number of pulses of a particular category occur within a grouping of pulses.

What is claimed is: 
     
       1. A digital signal receiving system comprising: a receiver that receives a digital signal and outputs a clock signal and a related data signal;   a jitter detector that receives said clock signal and said related data signal from said receiver and which outputs a stream of bit-by-bit jitter error pulses;   an averaging mechanism that receives said stream of bit-by-bit jitter error pulses from said jitter detector and which counts errors over windows of a predetermined size and which generates an error indication output signal if a predetermined number of errors is detected in a particular window;   a speech processor operating in parallel with said jitter detector and said averaging mechanism for converting said digital signal to an analog signal; and   a muting mechanism that receives said error indication signal from said averaging mechanism, said muting mechanism comprising means for attenuating said analog signal if errors reach a predetermined level and means for deattenuating said analog signal if errors do not reach said predetermined level.   
     
     
       2. A system as recited in claim 1, wherein said averaging mechanism comprises: means for isolating bits in said digital signal into groupings of bits, each grouping being of a predetermined size;   means for counting the number of errors that occur within each grouping; and   means for generating an error indication output signal when a predetermined number of errors occurs within a grouping of bits.   
     
     
       3. A system as recited in claim 2, wherein said averaging mechanism further comprises means for resetting said means for counting once counting of a grouping of bits is completed. 
     
     
       4. A system as recited in claim 3, wherein said averaging mechanism further comprises means for deactivating said means for generating, said means for deactivating operating in conjunction with said means for resetting. 
     
     
       5. A system as recited in claim 1, wherein said means for isolating comprises a programmable up counter that generates an output window strobe signal. 
     
     
       6. A system as recited in claim 5, wherein said means for counting comprises a programmable up counter that receives said window strobe signal from said means for isolating and that generates said error indication output signal. 
     
     
       7. An average jitter error indication apparatus for detecting data shifts in degraded digital signals, comprising: a jitter detector;   a window length counter adapted to receive at least a clock signal and a frame timing signal, and to produce a window strobe signal which defines a window time; and   an averaging mechanism adapted to receive said window strobe signal and a bit-wise jitter strobe from said jitter detector, and to produce an average jitter error indication signal, said averaging mechanism comprises a first programmable counter adapted to count bits of said bit-wise jitter strobe during said window time.   
     
     
       8. The average jitter error indication apparatus of claim 7, wherein said window length counter comprises a second programmable counter which counts to a predetermined number to define said window time, said second counter counting bits of said clock signal. 
     
     
       9. The apparatus of claim 8, wherein said frame timing signal resets said second programmable counter.