Arrangement and method relating to signal power amplification

Abstract

The power of an input signal is amplified and the power-amplified input signal forms an output signal whose power shall be in agreement with a reference level. The power of the signal is amplified with a power amplification circuit that includes a power amplifier and a control unit. The power amplification circuit also measures the power of the output signal. The control unit generates supply voltages for the transistors of the power amplifier in relation to said reference level, so as to obtain an efficient power amplifier. The control unit regulates the power of the output signal in relation to the reference level and in relation to the power of the output signal, so that the power of the output signal will be in general agreement with said reference level. The power amplifier also includes controllable matching circuits that are controlled by controlled signals generated in relation to said reference level, so as to further improve the efficiency of the power amplifier.

We claim: 
     
       1. A power amplification circuit for amplifying the power of an input signal and delivering the power amplified input signal as an output signal whose power substantially coincides with a reference level, said circuit comprising: a power amplifier which includes at least one amplification stage having at least one transistor, one input, one output, and supply voltage connections and bias voltage connections for said at least one transistor, wherein the power amplifier receives the input signal via the input and delivers the output signal via the output;   means for measuring the power of the output signal, wherein said means generates a detector signal that corresponds to the power of the output signal; and   a control unit comprising means for generating supply voltages and bias voltages for the transistors, a first signal input for receiving a power reference signal corresponding to the reference level, and a second signal input connected to the power measuring means for receiving said detector signal, wherein the means for generating the supply voltages and the bias voltages respectively are connected to the supply voltage connections and to the bias voltage connections respectively,   wherein the control unit generates the supply voltages in relation to the reference level; and   wherein the control unit modifies the bias voltages in relation to said reference level and also in relation to the power of the output signal until the power of the output signal substantially coincides with said reference level.   
     
     
       2. The power amplification circuit of claim 1, wherein the power amplifier includes at least one controllable matching circuit connected to at least one of said amplifying stages, wherein each of the controllable matching circuits is controlled in relation to at least one control signal and includes a corresponding number of control signal inputs for receiving the control signals; wherein the control unit includes control signal generating means which are connected to said control signal inputs; and   wherein the control unit generates the control signals in relation to the reference level.   
     
     
       3. The power amplification circuit of claim 2, wherein at least one of the controllable matching circuits is disposed between two of said amplifying stages. 
     
     
       4. The power amplification circuit of claim 2, wherein at least one of the controllable matching circuits is disposed at the power amplifier input. 
     
     
       5. The power amplification circuit of claim 2, wherein at least one of the controllable matching circuits is disposed at the power amplifier output. 
     
     
       6. The power amplification circuit of claim 1, wherein the control unit includes a bus system, said control unit further comprising: a processor unit, wherein said processor unit is connected to said bus system;   a memory unit comprising program and data containing memory means, wherein said memory unit is connected to said bus system; and   an analog I/O unit, wherein said analog I/O unit includes a predetermined number of analog signal outputs and wherein said analog I/O unit is connected to said bus system.   
     
     
       7. The power amplification circuit of claim 6, wherein the analog I/O unit delivers the supply voltages via a first array of signal outputs among the signal outputs of the analog I/O unit, wherein the signal outputs in the first signal outputs in the first signal output array are connected to the supply voltage connections. 
     
     
       8. The power amplification circuit of claim 6, wherein the analog I/O unit delivers the bias voltages via a second array of signal outputs among the signal outputs of the analog I/O unit, wherein the signal outputs in the second signal output array are connected to the bias voltage connections. 
     
     
       9. The power amplification circuit of claim 6, wherein the analog I/O unit includes a predetermined number of analog signal inputs; and wherein the first signal input for receiving the power reference signal is included in the analog signal input of the analog data unit. 
     
     
       10. The power amplification circuit of claim 9, wherein the second signal input for receiving the detector signal is included among the analog signal inputs of the analog I/O unit. 
     
     
       11. The power amplification circuit of claim 1, wherein the power measuring means measures the supply current to the last amplification stage. 
     
     
       12. A method of regulating or controlling a power amplifier, wherein said power amplifier comprises at least one amplification stage having at least one transistor, (an input, an output, supply voltage connections and bias voltage connections to said at least one transistor, and at least one controllable matching circuit connected to at least one of the amplifier stages, where each controllable matching circuit includes at least one control signal input, said method comprising: (a) receiving an input signal via said input;   (b) delivering an output signal via said output;   (c) registering a reference level for the power of the output signal;   (d) measuring the power of the output signal;   (e) generating supply voltages for the supply voltage connections to the transistors in relation to said reference level;   (f) generating control signals for the control signal inputs of the controllable matching circuits in relation to said reference level; and   (g) generating bias voltages for the bias voltage connections to the transistors such that the bias voltages are modified in relation to the reference level as well as the power of the output signal, until the power of the output signal substantially coincides with said reference level.   
     
     
       13. The method of claim 12, wherein said bias voltages generated in step (g) are increased when the reference level exceeds the power of the output signal and wherein said bias voltages are decreased when said power of the output signal exceeds said reference level. 
     
     
       14. A method of controlling or regulating a power amplifier wherein said power amplifier comprises at least one amplifying stage having at least one transistor, an input, an output, supply voltage connections and bias voltage connections to the transistors, said method comprising: (a) receiving an input signal via the input;   (b) delivering an output signal via the output;   (c) registering a reference level for the power of the output signal;   (d) measuring the power of the output signal;   (e) generating supply voltages for the supply voltage connections to the transistors in relation to said reference level; and   (f) generating bias voltages for the bias voltage connections to the transistors such that the bias voltages are modified in relation to said reference level and also in relation to the power of the output signal, until the power of the output signal substantially coincides with said reference level.   
     
     
       15. The method of claim 14, wherein said bias voltages generated in step (f) are increased when the reference-level exceeds the power of the output signal and decreased when the power of the output signal exceeds the reference level. 
     
     
       16. The use of a power amplification circuit of claim 1 in radio equipment. 
     
     
       17. The use of claim 16, wherein the radio equipment is portable radio equipment. 
     
     
       18. The use of claim 16, wherein the power amplification circuit is used in a radio transmitter. 
     
     
       19. The use of the method of claim 12 for regulating or controlling a power amplifier provided in radio equipment. 
     
     
       20. The use of claim 19, wherein the radio equipment is portable radio equipment. 
     
     
       21. The use of claim 19, wherein the power amplifier is provided in a radio transmitter.