Semiconductor device and method of manufacturing the same

Abstract

With a semiconductor device and according to a manufacturing method of the invention, a trade-off relationship between a threshold value and a diffusion layer leak is eliminated, and it is not necessary to form a gate oxide film at a plurality of steps. Gate electrodes (4A, 4B and 4C) respectively comprise a polysilicon layer (M1) and a WSi layer (L1), the polysilicon layer (M1) and a WSi layer (L2), the polysilicon layer (M1) and a WSi layer (L3), which are respectively stacked in this order on a gate oxide film (3). Channel dope layers (103A, 103B and 103C) are formed within a well layer (101) respectively under the gate electrodes (4A, 4B and 4C).

We claim: 
     
       1. A semiconductor device comprising at least one transistor on a semiconductor substrate, wherein said at least one transistor comprises: a semiconductor layer of a first conductivity type which is formed in a surface of said semiconductor substrate;   a channel dope layer of the first conductivity type which is formed selectively in said semiconductor layer; and   a control electrode which is formed at a position which faces said channel dope layer, above said semiconductor layer,   said control electrode has a polycide structure in which a tungsten silicide layer is formed on a polysilicon layer, and   said polysilicon layer contains an impurity of a second conductivity type, said impurity having such a distribution which shows a relatively high concentration on the tungsten silicide layer side but a relatively low concentration on the opposite side.   
     
     
       2. The semiconductor device of claim 1, wherein said at least one transistor comprises at least two types of transistors, and in said polycide structure, the ratio of a thickness of said tungsten silicide layer to a thickness of said polysilicon layer is different between said at least two types of transistors.   
     
     
       3. The semiconductor device of claim 2, wherein said at least two types of transistors include transistors of a first type to a third type, said transistor of said first type comprises: a pair of first semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said first type; and   a first gate oxide film formed on said semiconductor layer of said transistor of said first type between said pair of first semiconductor regions,   said channel dope layer of said transistor of said first type is formed between said pair of first semiconductor regions,     said control electrode of said transistor of said first type includes: a first polysilicon layer which is formed on said first gate oxide film; and   a first tungsten silicide layer which is formed on said first polysilicon layer,     said transistor of said second type comprises: a pair of second semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said second type; and   a second gate oxide film formed on said semiconductor layer of said transistor of said second type between said pair of second semiconductor regions,   said channel dope layer of said transistor of said second type is formed between said pair of second semiconductor regions,     said control electrode of said transistor of said second type includes: a second polysilicon layer which is formed on said second gate oxide film; and   a second tungsten silicide layer which is formed on said second polysilicon layer,     said transistor of said third type comprises: a pair of third semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said third type; and   a third gate oxide film formed on said semiconductor layer of said transistor of said third type between said pair of third semiconductor regions,   said channel dope layer of said transistor of said third type is formed between said pair of third semiconductor regions,     said control electrode of said transistor of said third type includes: a third polysilicon layer which is formed on said third gate oxide film; and   a third tungsten silicide layer which is formed on said third polysilicon layer, the ratio of thickness of said first tungsten silicide layer and said first polysilicon layer, the ratio of thickness of said second tungsten silicide layer and said second polysilicon layer, and the ratio of thickness of said third tungsten silicide layer and said third polysilicon layer are respectively different from each other,   said first to said third gate oxide films have the same thickness, and   said channel dope layers of said transistors of said first to said third types have the same impurity concentration.     
     
     
       4. The semiconductor device of claim 2, wherein said at least two types of transistors include transistors of a first type to a third type, said transistor of said first type comprises: a pair of first semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said first type; and   a first gate oxide film formed on said semiconductor layer of said transistor of said first type between said pair of first semiconductor regions,   said channel dope layer of said transistor of said first type is formed between said pair of first semiconductor regions,     said control electrode of said transistor of said first type includes: a first polysilicon layer which is formed on said first gate oxide film; and   a first tungsten silicide layer which is formed on said first polysilicon layer,     said transistor of said second type comprises: a pair of second semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said second type; and   a second gate oxide film formed on said semiconductor layer of said transistor of said second type between said pair of second semiconductor regions,   said channel dope layer of said transistor of said second type is formed between said pair of second semiconductor regions,     said control electrode of said transistor of said second type includes: a second polysilicon layer which is formed on said second gate oxide film; and   a second tungsten silicide layer which is formed on said second polysilicon layer,     said transistor of said third type comprises: a pair of third semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said third type;   a third gate oxide film formed on said semiconductor layer of said transistor of said third type between said pair of third semiconductor regions; and   a floating gate electrode which is formed on said third gate oxide film; and   an inter-layer insulation film which is formed on said floating gate electrode,   said channel dope layer is formed between said pair of third semiconductor regions,     said control electrode of said transistor of said third type includes: a third polysilicon layer which is formed on said inter-layer insulation film; and   a third tungsten suicide layer which is formed on said third polysilicon layer,   the ratio of a thickness of said first tungsten silicide layer to a thickness of said first polysilicon layer is higher than the ratios of thicknesses of said second and third tungsten silicide layers to thicknesses of said second and third polysilicon layers,   said first and said second gate oxide films have the same thickness which is a first thickness while said third gate oxide film has a second thickness which is thicker than said first thickness, and   said channel dope layers of said transistors of said first to said third types have the same impurity concentration.     
     
     
       5. The semiconductor device of claim 2, wherein said at least two types of transistors include transistors of a first type to a third type, said transistor of said first type comprises: a pair of first semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said first type; and   a first gate oxide film formed on said semiconductor layer of said transistor of said first type between said pair of first semiconductor regions,   said channel dope layer of said transistor of said first type is formed between said pair of first semiconductor regions,     said control electrode of said transistor of said first type includes: a first polysilicon layer which is formed on said first gate oxide film; and   a first tungsten silicide layer which is formed on said first polysilicon layer,     said transistor of said second type comprises: a pair of second semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said second type; and   a second gate oxide film formed on said semiconductor layer of said transistor of said second type between said pair of second semiconductor regions,   said channel dope layer of said transistor of said second type is formed between said pair of second semiconductor regions,     said control electrode of said transistor of said second type includes: a second polysilicon layer which is formed on said second gate oxide film; and   a second tungsten silicide layer which is formed on said second polysilicon layer,     said transistor of said third type comprises: a pair of third semiconductor regions of the second conductivity type formed selectively and independently within said semiconductor layer of said transistor of said third type;   a third gate oxide film formed on said semiconductor layer of said transistor of said third type between said pair of third semiconductor regions; and   said channel dope layer is formed between said pair of third semiconductor regions,     said control electrode of said transistor of said third type includes: a third polysilicon layer which is formed on said third gate oxide film; and   a third tungsten silicide layer which is formed on said third polysilicon layer,   the ratio of a thickness of said third tungsten silicide layer to a thickness of said third polysilicon layer is higher than the ratios of thicknesses of said second and third tungsten silicide layers to thicknesses of said second and third polysilicon layers,   said first to said third gate oxide films have the same thickness, and said channel dope layers of said transistors of said first and said third types have the same impurity concentration.     
     
     
       6. A semiconductor device comprising at least one transistor on a semiconductor substrate, wherein said at least one transistor comprises: an active region which is defined by a field oxide film which is selectively formed on a major surface of said semiconductor substrate;   an oxide film which is formed on said active region; and   a control electrode which is formed on said oxide film, said control electrode including a polysilicon layer in which an impurity of the same conductivity type as a source/drain layer is implanted,   said control electrode includes a tungsten silicide layer which is selectively formed on said polysilicon layer which is on an edge portion of said active region, and   said impurity has a distribution which shows a relatively high concentration on the tungsten silicide layer side but a relatively low concentration on the opposite side.   
     
     
       7. The semiconductor device of claim 6, further comprising a metal silicide layer, other than said tungsten silicide layer, which is formed on said tungsten silicide layer and said active region.