Electronic circuit with a clock switch

Abstract

An electronic circuit comprises clocked functional circuits which receive a clock signal via a clock switch. The clock switch contains an enabled non-inverting driver which switches a connection between a power supply input and a clock output on and off under control of a clock signal only when the clock switch is enabled by an enable signal. The clock switch also contains a transmission switch coupled between a clock input and the clock output. The transmission switch is controlled from the enable input and makes a conductive connection between the clock input and the clock output only when the clock switch is enabled by the enable signal. As a result, transitions in the clock signal reach the functional circuits with less delay and power take-up needed to drive the clock signal is distributed so that there is less supply bounce.

What is claimed is: 
     
       1. An electronic circuit comprising clocked functional circuits and a clock switch, the clock switch having a power supply input, an enable input for receiving an enable signal, a clock input for receiving a clock signal and a clock output coupled to the functional circuits, the clock switch containing an enable-controlled non-inverting driver which switches a connection between the power supply input and the clock output on and off under control of the clock signal only when the clock switch is enabled by the enable signal,   a transmission switch coupled between the clock input and the clock output and controlled from the enable input for making a conductive connection between the clock input and the clock output only when the clock switch is enabled by the enable signal.   
     
     
       2. An electronic circuit according to claim 1 comprising a clock driver having an output coupled to the clock input of the clock switch, the clock driver and the functional circuits being located spatially separated from one another, the clock switch being located spatially closer to the functional circuits than to the clock driver. 
     
     
       3. An electronic circuit according to claim 1, wherein the enable-controlled driver comprises in series between a first and a second power supply connection successively a channel of a first transistor, a first node, a channel of a second transistor, a second node and a load circuit, the enable input being coupled to a control electrode of the first transistor and the clock input being coupled to a control electrode of the second transistor, the second node being coupled to the clock output, the transmission switch comprising channels of complementary transistors in parallel, control gates of the complementary transistors being coupled to the enable input and the first node respectively. 
     
     
       4. An electronic circuit according to claim 1, containing further functional circuits which receive the clock signal other than through the clock switch, wherein the functional circuits and the further functional circuits receive power from a central power supply via a first and second supply line respectively, the power supply input of the clock switch being connected to the first power supply line, the first and second power supply lines being interconnected only between the central power supply on one hand and connections of the clock switch and of the functional circuits to the first power supply line on the other hand.