Gas mixture for etching a polysilicon electrode layer and etching method using the same

Abstract

A gas mixture for etching a polysilicon electrode layer in a plasma etching apparatus, and a method for etching the electrode layer using the same. The etching gas mixture is a mixture of Cl2 gas and N2 gas, wherein the N2 gas is in the range of about 30% by volume of the total volume of Cl2 gas and N2 gas combined. In the electrode layer etching method of the present invention, the polysilicon electrode layer is formed on a semiconductor substrate. A mask pattern of an oxide or photoresist is then formed on the electrode layer. The electrode layer is etched using a plasma formed by the gas mixture of Cl2 gas and N2 gas, with the mask pattern functioning as an etching mask. An upper power source of the plasma etching apparatus delivers power in the range of about 500 to 1000 W, while the etching gas mixture is formed by supplying Cl2 gas at a rate of about 100 to 400 sccm, and N2 gas at a rate of about 3 to 15 sccm.

What is claimed is: 
     
       1. A method for etching an electrode layer of a semiconductor device comprising the steps of: forming the electrode layer on a semiconductor substrate using a conductive material;   forming a mask pattern on the electrode layer to create an etching mask; and   etching the electrode layer in a plasma etching chamber by supplying a gas mixture of Cl 2  gas and N 2  gas into the reaction chamber, wherein the N 2  gas is in the range of about 30% by volume of the total volume of the Cl 2  gas and N 2  gas combined, and delivering power in the range of from 700 W to 1000 W to a coil provided in an upper part of the etching chamber to ionize the Cl 2  and thereby form plasma used to etch the electrode layer.   
     
     
       2. The method according to claim 1, wherein the electrode layer comprises polysilicon. 
     
     
       3. The method according to claim 2, wherein the electrode layer forms a lower electrode of a capacitor. 
     
     
       4. The method according to claim 1, wherein the mask pattern is an oxide layer. 
     
     
       5. The method according to claim 1, wherein the mask pattern is a photoresist layer. 
     
     
       6. The method according to claim 1, wherein the etching step comprises supplying the Cl 2  gas into the plasma etching chamber at a rate of from about 100 to 400 sccm, and supplying the N 2  gas into the etching chamber at a rate of from about 3 to 15 sccm. 
     
     
       7. The method according to claim 1, wherein the etching is performed by also delivering power to a lower portion of the etching chamber below the semiconductor substrate in order to draw the ionized gas toward the substrate. 
     
     
       8. The method according to claim 7, wherein the etching is performed using a Transformer Coupled Plasma etching apparatus. 
     
     
       9. The method according to claim 1, wherein the etching is performed using only a single electrode. 
     
     
       10. The method according to claim 7, wherein the etching is performed by delivering power in the range of from about 70 W to about 200 W to the lower portion of the etching chamber. 
     
     
       11. The method according to claim 10, wherein the etching step also comprises maintaining a pressure in the plasma etching chamber of from about 15 mTorr to about 25 mTorr.