Reproduced signal processing method, reproduced signal processing circuit, and a magnetic storage apparatus

Abstract

A reproduced signal processing circuit includes a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted; an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal; and a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter. A reproduced signal processing method includes the steps of operating a first control loop for controlling the variable gain amplifier; operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator, the third control loop controlling the variable frequency oscillator; filtering by analog filter means the read signal inputted to the variable gain amplifier; operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.

What is claimed is: 
     
       1. A reproduced signal processing method for use with a reproduced signal processing circuit, the reproduced signal processing circuit including a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted,   an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal, and   a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter,   the reproduced signal processing method comprising the steps of: operating a first control loop for controlling the variable gain amplifier in accordance with at least either one of the analog reproduced signal according to an output signal from the variable gain amplifier and the digital reproduced signal corresponding to an output signal from the analog-to-digital converter;   operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator in accordance with the analog reproduced signal corresponding to an output signal from the variable gain amplifier, the third control loop controlling the variable frequency oscillator in accordance with the digital reproduced signal corresponding to an output signal from the analog-to-digital converter;   filtering by analog filter means the read signal inputted to the variable gain amplifier, the analog filter means having a cutoff frequency range variable for a signal inputted thereto;   operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and   changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.     
     
     
       2. A reproduced signal processing method according to claim 1, wherein the reproducing head is a magnetoresistive head; and wherein the reproduced signal processing method further comprises the step of controlling, when a thermal asperity noise is detected by any one of the first, second, and third noise detecting operations, the cutoff frequency of the analog filter means to selectively change between a frequency substantially equal to 0.01×Nyquist frequency in the sampling of the reproduced signal and a frequency substantially equal to at least 0.05×Nyquist frequency in the sampling of the reproduced signal.   
     
     
       3. A reproduced signal processing method according to claim 1, wherein the second noise detecting operation includes the steps of: reading a positive threshold value and a negative threshold value from registers for decision of presence or absence of a noise in the analog reproduced signal; and   determining occurrence of a noise when a preamble in the reproduced signal does not keep a predetermined cycle for a period of K or more samples (K is a positive integer equal to or more than two) and a result of a level-slicing of the analog reproduced signal by the threshold values includes a value of only either one of the polarities.   
     
     
       4. A reproduced signal processing method according to claim 1, wherein the third noise detecting operation includes the step of determining occurrence of a noise when an output signal from the analog-to-digital converter during an operation period of the third control loop is saturated in N or more samples (N is a positive integer equal to or more than two) with either one of the polarities among M samples (M is a positive integer equal to or more than two) and no saturation is detected with the other one of the polarities. 
     
     
       5. A reproduced signal processing method according to claim 1, further comprising the step of controlling a gain of the variable gain amplifier to be increased when a response characteristic of the first control loop is set such that an operation to bring an amplitude of the analog reproduced signal close down to the target value takes precedence over an operation to bring an amplitude of the analog reproduced signal close up to the target value and a result of a level-slicing by the second noise detecting operation of the analog reproduced signal by two predetermined threshold values includes a value of only either one of the polarities in a period other than an operation period of the third control loop. 
     
     
       6. A reproduced signal processing method according to claim 1, further comprising the steps of: detecting, by a hard detection, presence or absence of a particular abnormal pattern in the digital reproduced signal; and   invalidating a control output from the third control loop when the particular abnormal pattern is detected.   
     
     
       7. A reproduced signal processing method according to claim 1, further comprising the steps of: conducting a logical sum operation for results from the first, second, and third noise detecting operations; and   outputting an operation result of the logical sum operation to an external device.   
     
     
       8. A reproduced signal processing circuit comprising: a variable gain amplifier to which a signal read from a desired medium by a reproducing head is inputted;   an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal;   a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter;   a first control circuit for controlling the variable gain amplifier in accordance with at least either one of the analog reproduced signal corresponding to an output signal from the variable gain amplifier and the digital reproduced signal corresponding to an output signal from the analog-to-digital converter;   at least either one of a second control circuit and a third control circuit, the second control circuit controlling the variable frequency oscillator in accordance with the analog reproduced signal corresponding to an output signal from the variable gain amplifier, the third control circuit controlling the variable frequency oscillator in accordance with the digital reproduced signal corresponding to an output signal from the analog-to-digital converter;   analog filter means disposed in a stage before the variable gain amplifier, the means having a cutoff frequency range variable for a signal inputted thereto;   at least one of first, second, and third noise detecting means, the first noise detecting means detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting means detecting a noise during an operation period of the second control circuit, the third noise detecting means detecting a noise during an operation period of the third control circuit; and   means for changing the range of cutoff frequency of the analog filter means in accordance with a noise detection result from at least one of the first, second, and third noise detecting means, thereby controlling at least one of the first, second, and third control circuits.   
     
     
       9. A reproduced signal processing circuit according to claim 8, wherein the reproducing head is a magnetoresistive head; and wherein the control means controls, when a thermal asperity noise is detected by either one of the first, second, and third noise detecting means, the cutoff frequency of the analog filter means to selectively change between a frequency substantially equal to 0.01×Nyquist frequency in the sampling of the reproduced signal and a frequency substantially equal to at least 0.05×Nyquist frequency in the sampling of the reproduced signal.   
     
     
       10. A reproduced signal processing circuit according to claim 8, wherein the first noise detecting means includes a first register for storing therein the predetermined threshold value; wherein the second noise detecting means includes a second register for storing therein a threshold value for decision of presence or absence of a noise in the analog reproduced signal; and   wherein the first and second registers are independent of each other.   
     
     
       11. A reproduced signal processing circuit according to claim 8, wherein the second noise detecting means includes a second register for storing therein a threshold value for decision of presence or absence of a noise in the analog reproduced signal; and wherein the second noise detecting means determines occurrence of a noise when a preamble in the reproduced signal does not keep a predetermined cycle for a period of K or more samples (K is a positive integer equal to or more than two) and a result of a level-slicing of the analog reproduced signal by the threshold values includes a value of only either one of the polarities.   
     
     
       12. A reproduced signal processing circuit according to claim 11, wherein the second noise detecting means determines occurrence of a thermal asperity noise in a case of K≧4. 
     
     
       13. A reproduced signal processing circuit according to claim 8, wherein the third noise detecting means determines occurrence of a noise when an output signal from the analog-to-digital converter during an operation period of the third control circuit is saturated in N or more samples (N is a positive integer equal to or more than two) with either one of the polarities among M samples (M is a positive integer equal to or more than two) and no saturation is detected with the other one of the polarities. 
     
     
       14. A reproduced signal processing circuit according to claim 13, wherein the third noise detecting means determines occurrence of a thermal asperity noise in a case of N≧3 and M=8. 
     
     
       15. A reproduced signal processing circuit according to claim 8, further comprising means for controlling a gain of the variable gain amplifier to be increased when a response characteristic of the first control circuit is set such that an operation to bring an amplitude of the analog reproduced signal close down to the target value takes precedence over an operation to bring an amplitude of the analog reproduced signal close up to the target value and a result of a level-slicing by the second noise detecting means of the analog reproduced signal by two predetermined threshold values includes a value of only either one of the polarities in a period other than an operation period of the third control circuit. 
     
     
       16. A reproduced signal processing circuit according to claim 8, wherein the third control circuit includes abnormal signal detecting means for detecting, by a hard detection, presence or absence of a particular abnormal pattern in the digital reproduced signal, and invalidating a control output from the third control circuit when the particular abnormal pattern is detected. 
     
     
       17. A reproduced signal processing circuit according to claim 8, further comprising: means for conducting a logical sum operation for results from the first, second, and third noise detecting operations; and   either one of a register for keeping a result of the logical sum operation therein and a terminal for outputting the operation result to an external device.   
     
     
       18. A magnetic storage apparatus comprising: a magnetic storage medium;   a reproducing head for reading information from the magnetic storage medium; and   a reproduced signal processing circuit coupled with the reproducing head, the reproduced signal processing circuit including: a variable gain amplifier for controlling an amplitude of a read signal supplied from the reproducing head thereto;   an analog-to-digital converter for converting a reproduced signal outputted from the variable gain amplifier into a digital signal;   a variable frequency oscillator for generating a sampling clock signal of the analog-to-digital converter;   a first control loop for bringing in accordance with at least either one of the analog reproduced signal corresponding to an output signal from the variable gain amplifier and the digital reproduced signal corresponding to an output signal from the analog-to-digital converter an amplitude of the analog reproduced signal close to a desired target value;   at least either one of a second control loop and a third control loop, the second control loop bringing a phase of a sampling clock signal of the variable frequency oscillator to a target phase in accordance with the analog reproduced signal corresponding to an output signal from the variable gain amplifier, the third control loop bringing a phase of a sampling clock signal of the variable frequency oscillator to a target phase in accordance with the digital reproduced signal corresponding to an output signal from the analog-to-digital converter;   at least one of first, second, and third noise detecting means, the first noise detecting means detecting presence or absence of a noise by comparing an amplitude of an output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting means detecting a noise during an operation period of the second control loop, the third noise detecting means detecting a noise during an operation period of the third control loop;   analog filter means disposed in a stage before the variable gain amplifier, the means having a cutoff frequency range variable for changing a signal inputted thereto; and   control means for changing, in accordance with a noise detection result from at least one of the first, second, and third noise detecting means, a cutoff frequency range of a high-pass characteristic of the analog filter means for a data region of the reproduced signal at a desired rate with respect to a Nyquist frequency in the sampling of the reproduced signal.     
     
     
       19. A magnetic storage apparatus according to claim 18, wherein the reproducing head is a magnetoresistive head; and wherein the control means controls, when a thermal asperity noise is detected by either one of the first, second, and third noise detecting means, the cutoff frequency of the analog filter means to selectively change between a frequency substantially equal to 0.01×Nyquist frequency in the sampling of the reproduced signal and a frequency substantially equal to at least 0.05×Nyquist frequency in the sampling of the reproduced signal.   
     
     
       20. A magnetic storage apparatus according to claim 18, wherein the first noise detecting means includes a first register for storing therein the predetermined threshold value; wherein the second noise detecting means includes a second register for storing therein a threshold value for decision of presence or absence of a noise in the analog reproduced signal; and   wherein the first and second registers are independent of each other.   
     
     
       21. A magnetic storage apparatus according to claim 18, wherein the second noise detecting means includes a second register for storing therein a threshold value for decision of presence or absence of a noise in the analog reproduced signal; and wherein the second noise detecting means determines occurrence of a noise when a preamble in the reproduced signal does not keep a predetermined cycle for a period of K or more samples (K is a positive integer equal to or more than two) and a result of a level-slicing of the analog reproduced signal by the threshold values includes a value of only either one of the polarities.   
     
     
       22. A magnetic storage apparatus according to claim 21, wherein the second noise detecting means determines occurrence of a thermal asperity noise in a case of K≧4. 
     
     
       23. A magnetic storage apparatus according to claim 18, wherein the third noise detecting means determines occurrence of a noise when an output signal from the analog-to-digital converter during an operation period of the third control loop is saturated in N or more samples (N is a positive integer equal to or more than two) with either one of the polarities among M samples (M is a positive integer equal to or more than two) and no saturation is detected with the other one of the polarities. 
     
     
       24. A magnetic storage apparatus according to claim 23, wherein the third noise detecting means determines occurrence of a thermal asperity noise in a case of N≧3 and M=8. 
     
     
       25. A magnetic storage apparatus according to claim 18, wherein the reproduced signal processing circuit further includes means for controlling a gain of the variable gain amplifier to be increased when a response characteristic of the first control loop is set such that an operation to bring an amplitude of the analog reproduced signal close down to the target value takes precedence over an operation to bring an amplitude of the analog reproduced signal close up to the target value and a result of a level-slicing by the second noise detecting means of the analog reproduced signal by two predetermined threshold values includes a value of only either one of the polarities in a period other than an operation period of the third control loop. 
     
     
       26. A magnetic storage apparatus according to claim 18, wherein the third control loop includes abnormal signal detecting means for detecting, by a hard detection, presence or absence of a particular abnormal pattern in the digital reproduced signal, and invalidating a control output from the third control loop when the particular abnormal pattern is detected. 
     
     
       27. A magnetic storage apparatus according to claim 18, wherein the reproduced signal processing circuit further includes: means for conducting a logical sum operation for results from the first, second, and third noise detecting means; and   either one of a register for keeping a result of the logical sum operation therein and a terminal for outputting the operation result to an external device.