Test system and process with a microcomputer at each test location

Abstract

An integrated circuit device test arrangement includes a plurality of microcomputers. Each of the microcomputers is interconnected directly through a separate test socket to a separate integrated circuit device that is inserted into the test socket. A device tester is called to the plurality of microcomputers for transmitting information between the device tester and the plurality of microcomputers. Each microcomputer contains instructions and data for performing a test routine on the associated integrated circuit device and transmitting selected results of the test routine to the tester.

What is claimed is: 
     
       1. A test system comprising: A. a plurality of test locations each adapted to receive an integrated circuit to be tested by electrical test signals;   B. a microcomputer at each test location that is coupled to that location, each microcomputer receiving program and data information for performing the testing at that location, each microcomputer processing the program and data information to control production of the test signals to that test location and collecting test result information from that test location;   C. a central test computer coupled to the microcomputers, the central test computer supplying the program and data information to each microcomputer and receiving the test result information from each microcomputer; and   D. a serial interface that passes packets of program and data information between the microcomputers and the central test computer.   
     
     
       2. The system of claim 1 including driver circuits at each location that produce the test signals under control of the microcomputer at that location. 
     
     
       3. A process of operating a test system comprising: A. providing an integrated circuit at each of plural test locations;   B. transmitting program and data information from a central test computer to a microcomputer at each test location by transmitting packet based information;   C. processing the program and data information in the microcomputer at each test location to control test signals to be applied to the integrated circuit at that test location;   D. testing the integrated circuit at each test location;   E. collecting test result information from the integrated circuit at each location in the microcomputer at that location; and   F. transmitting the test result information from each microcomputer to the central test computer by transmitting packet based information.   
     
     
       4. The process of claim 3 in which the testing includes applying test signals to the integrated circuit at a test location from device driver circuits at that location under control of the microcomputer at that location.