Wafer expansion-and-contraction simulating method

Abstract

A wafer expansion-and-contraction simulation method in which stress (intrinsic stress) caused in a film forming process on a wafer is taken into consideration, the calculation time can be shorten, and a storage amount of data can be reduced. In the simulation method, an elastic thermal stress simulation when the temperature of the silicon wafer is increased from the room temperature to the film forming temperature is performed, and the displacement of the wafer thus obtained is reserved. Thereafter, an elastic thermal stress simulation when the temperature of the silicon wafer coated with the thin film is decreased from the film forming temperature to the room temperature is performed, and the displacement of the wafer thus obtained is reserved. In the simulation, thermal strain is uniformly applied to the thin film as corresponding to an intrinsic stress in the film forming process. Finally, the displacement values in the respective steps are added to obtain the total displacement due to the expansion and contraction of the wafer in the film forming process.

What is claimed is: 
     
       1. A computer programmed to perform a wafer expansion-and-contraction simulation method for estimating expansion and contraction of a wafer which is caused when a thin film is formed on the wafer, comprising: calculating on the basis of a thermal stress analysis a first displacement of the wafer from an initial wafer state stored in a first memory location caused when a temperature of the wafer is increased from a room temperature to a film forming temperature of the thin film, and storing the first displacement in a second memory location;   calculating on the basis of a thermal stress analysis a second displacement of the wafer from the first displacement stored in the second memory location caused when the temperature of the wafer is decreased to the room temperature after the film is formed thereon, and storing the second displacement in a third memory location; and   adding the first displacement and the second displacement to estimate an overall expansion and contraction of the wafer from the initial state stored in the first memory location, and storing in a fourth memory location.   
     
     
       2. The computer programmed to perform a wafer expansion-and-contraction simulation method as claimed in claim 1, wherein, in calculating the second displacement, a stress caused when the thin film is formed is uniformly applied into the thin film in terms of thermal strain caused by a temperature difference between the thin film and the wafer. 
     
     
       3. The computer programmed to perform a wafer expansion-and-contraction simulation method as claimed in claim 1, wherein the wafer is a silicon wafer. 
     
     
       4. The computer programmed to perform a wafer expansion-and-contraction simulation method as claimed in claim 1, wherein the thin film is made of Si 3  N 4 . 
     
     
       5. A method executed in a computer of determining an overall displacement of a wafer from an initial state stored in a first memory location subject to a high temperature formation of a film thereon, comprising: calculating a first displacement from the initial state that varies according to a temperature change from a room temperature to a film formation temperature, and storing the first displacement in a second memory location;   calculating a second displacement from the first displacement that varies according to a temperature change from the film formation temperature to the room temperature, wherein an initial temperature of the film is modified according to an adjustment that varies according to intrinsic stress between the wafer and the film formed thereon, and storing the second displacement in a third memory location; and   calculating the overall displacement by adding the first and second displacements to determine overall displacement of the wafer from the initial state stored in the first memory location, and storing the overall displacement in a fourth memory location.   
     
     
       6. A method, according to claim 5, further comprising: determining the adjustment by experimentation.   
     
     
       7. A method, according to claim 6, wherein the experimentation includes making measurements of displacement of an actual film on an actual wafer. 
     
     
       8. A method, according to claim 5, wherein the first and second displacements are calculated using thermal stress analysis. 
     
     
       9. A method, according to claim 5, wherein the wafer is a silicon wafer. 
     
     
       10. A method, according to claim 5, wherein the film is Si 3  N 4 . 
     
     
       11. A computer program stored in a memory device and capable of simulating overall displacement of a wafer subject to high temperature formation of a film thereon from an initial state stored in a location of the memory device, comprising: means for calculating a first displacement that varies according to a temperature change from a room temperature to a film formation temperature;   means for calculating a second displacement that varies according to a temperature change from the film formation temperature to the room temperature, wherein an initial temperature of the film is modified according to an adjustment that varies according to intrinsic stress between the wafer and the film formed thereon; and   means for calculating the overall displacement by adding the first and second displacements to determine overall displacement of the wafer from the initial state.   
     
     
       12. A computer program, according to claim 11, wherein the adjustment is determined by experimentation that includes making measurements of displacement of an actual film on an actual wafer. 
     
     
       13. A computer program, according to claim 11, wherein the first and second displacements are calculated using thermal stress analysis. 
     
     
       14. A computer program, according to claim 11, wherein the wafer is a silicon wafer. 
     
     
       15. A computer program, according to claim 11, wherein the film is Si 3  N 4 .