Programmable voltage regulator circuit with low power consumption feature

Abstract

A voltage regulator according to the present invention includes a programmable reference generator, a programmable output adjustor, an error amplifier, and an output driver. The programmable reference generator is responsive to a first programming signal and generates a reference voltage. The programmable output adjustor is responsive to a second programming signal and generates an output adjust voltage. The error amplifier generates an error voltage corresponding to a difference between the reference voltage and the output adjust voltage. The output driver drives a regulated output voltage in response to the error voltage. A capacitor is coupled between the regulated output voltage and a ground voltage to eliminate ripple components on the regulated voltage.

What is claimed is:  
     
       1. A voltage regulator for generating a regulated output voltage by using a power supply voltage, comprising: 
       a programmable reference generator responsive to a first programming signal applied externally, for generating a reference voltage corresponding to the first programming signal by using the power supply voltage;  
       a programmable output adjustor responsive to a second programming signal applied externally, for generating an output adjust voltage corresponding to the second programming signal by using the regulated output voltage;  
       an error amplifier for generating an error voltage corresponding to a difference between the reference voltage and the output adjust voltage; and  
       an output driver for driving the regulated output voltage in response to the error voltage.  
     
     
       2. The voltage regulator according to claim  1 , further comprises a capacitor coupled between the regulated output voltage and a ground voltage. 
     
     
       3. The voltage regulator according to claim  1 , wherein the programmable reference generator, the programmable output adjustor and the error amplifier are selectively disabled in response to a power saving control signal applied externally. 
     
     
       4. The voltage regulator according to claim  1 , wherein the output driver is disabled in response to an output enable control signal applied externally. 
     
     
       5. The voltage regulator according to claim  1 , wherein the programmable reference generator, the programmable output adjustor, the error amplifier and the output driver are integrated into a single semiconductor chip. 
     
     
       6. The voltage regulator according to claim  5 , further comprises a capacitor coupled between the regulated output voltage and a ground voltage, wherein the capacitor is of a standalone type. 
     
     
       7. A voltage regulator for generating a regulated output voltage by using a power supply voltage, comprising: 
       a programmable reference generator responsive to a first programming signal applied externally, for generating a reference voltage corresponding to the first programming signal by using the power supply voltage;  
       a programmable output adjustor responsive to a second programming signal applied externally, for generating an output adjust voltage corresponding to the second programming signal by using the regulated output voltage;  
       an error amplifier for generating an error voltage corresponding to a difference between the reference voltage and the output adjust voltage; and  
       an output driver for driving the regulated output voltage in response to the error voltage;  
       wherein the programmable reference generator includes a variable resistance circuit for providing a variable resistance in response to the first programming signal, and a bandgap reference circuit for generating the reference voltage based on the variable resistance.  
     
     
       8. The voltage regulator according to claim  7 , wherein the variable resistance circuit includes: 
       a decoder for providing a plurality of decoding signals by decoding the first programming signal;  
       a resistor array having a plurality of serially-connected resistors; and  
       a control circuit for varying resistance of the resistor array in response to the decoding signals.  
     
     
       9. The voltage regulator according to claim  7 , wherein the bandgap reference circuit includes a bias voltage generator for generating a bias voltage varying in response to the variable resistance. 
     
     
       10. The voltage regulator according to claim  9 , wherein the error amplifier is biased by the bias voltage. 
     
     
       11. The voltage regulator according to claim  9 , wherein the bias voltage generator includes a cascode current source. 
     
     
       12. The voltage regulator according to claim  11 , wherein the cascode current source includes a plurality of current mirrors serially connected between the power supply voltage and the variable resistance circuit. 
     
     
       13. The voltage regulator according to claim  12 , wherein the cascode current source is disabled in response to a power saving control signal applied externally. 
     
     
       14. The voltage regulator according to claim  13 , wherein the cascode current source comprises; 
       a first transistor having a control electrode coupled to the power saving control signal and a conduction path of which a first end is coupled to the power supply voltage;  
       a second transistor having a control electrode coupled to the bias voltage and a conduction path of which a first end is coupled to a second end of the first transistor conduction path and a second end is coupled to the bias voltage;  
       a third transistor having a control electrode coupled to the bias voltage and a conduction path of which a first end is coupled to the second end of the first transistor conduction path;  
       a fourth transistor having a conduction path of which a first end is coupled to the bias voltage and a second end is coupled to a control electrode of the fourth transistor;  
       a fifth transistor having a control electrode coupled to the second end of the fourth transistor conduction path and a conduction path of which a first end is coupled to a second end of the third transistor conduction path;  
       a sixth transistor having a conduction path of which a first end is coupled to a second end of the fifth transistor conduction path and a control electrode of the sixth transistor;  
       a seventh transistor having a control electrode coupled to the second end of the fifth transistor conduction path and a conduction path of which a first end is coupled to the second end of the fourth transistor conduction path;  
       an eighth transistor having a control electrode coupled to a second end of the sixth transistor conduction path and a conduction path of which a first end is coupled to the second end of the sixth transistor conduction path and a second end is coupled to a ground voltage; and  
       a ninth transistor having a control electrode coupled to the second end of the sixth transistor conduction path and a conduction path of which a first end is coupled to a second end of the seventh transistor conduction path and a second end coupled to the variable resistance circuit.  
     
     
       15. The voltage regulator according to claim  14 , wherein the first, second, third, fourth, and fifth transistors are first type transistors, and the sixth, seventh, eighth and ninth transistors are second type transistors. 
     
     
       16. The voltage regulator according to claim  14 , wherein the bandgap reference circuit comprises: 
       a tenth transistor having a control electrode coupled to the bias voltage and a conduction path of which a first end is coupled to the second end of the first transistor conduction path;  
       an eleventh transistor having a control electrode coupled to the second end of the fourth transistor conduction path and a conduction path of which a first end is coupled to a second end of the tenth transistor conduction path;  
       a resistor having a first end coupled to a second end of the eleventh transistor conduction path and a second end;  
       a twelfth transistor having a control electrode coupled to the ground voltage and a conduction path of which a first end is coupled to the second end of the resistor and a second end is coupled to the ground voltage;  
       a transmission gate having a conduction path coupled between the second end of the eleventh transistor conduction path and the reference voltage, a first control electrode coupled to the power saving control signal, and a second control electrode coupled through the inverter to the power saving control signal; and  
       a capacitor having a first end coupled to the reference voltage and a second end coupled to the ground voltage.  
     
     
       17. The voltage regulator according to claim  16 , wherein the tenth and eleventh transistors are MOS field effect transistors, and the twelfth transistor is bipolar junction transistor. 
     
     
       18. The voltage regulator according to claim  15 , wherein the first type transistors and the second type transistors are MOS field effect transistors. 
     
     
       19. The voltage regulator according to claim  7 , wherein the programmable output adjustor includes: 
       a decoder for providing a plurality of decoding signals by decoding the second programming signal; and  
       an adjust voltage generator for varying the output adjust voltage in response to the decoding signals.  
     
     
       20. The voltage regulator according to claim  19 , wherein the adjust voltage generator includes a variable voltage divider responsive to the decoding signals. 
     
     
       21. The voltage regulator according to claim  20 , wherein the variable voltage divider includes: 
       a capacitor array having a plurality of capacitors; and  
       a control circuit for varying capacitance of the capacitor array in response to the decoding signals.  
     
     
       22. The voltage regulator according to claim  7 , wherein the error amplifier includes a differential amplifier. 
     
     
       23. The voltage regulator according to claim  7 , wherein the output driver is disabled in response to an output enable control signal applied externally. 
     
     
       24. The voltage regulator according to claim  23 , wherein the output driver comprises: 
       a first transistor having a conduction path coupled between the power supply voltage and the regulated output voltage, and a control electrode;  
       a second transistor having a conduction path coupled between the power supply voltage and the control electrode of the first transistor, and a control electrode coupled to the output enable control signal;  
       an inverter having an anode coupled to the output enable control signal and a cathode; and  
       a transmission gate having a conduction path coupled between the error voltage and the control electrode of the first transistor, a first control electrode coupled to the output enable control signal, and a second control electrode coupled to the cathode of the inverter.  
     
     
       25. A voltage regulator for generating a regulated output voltage by using a power supply voltage, comprising: 
       a programmable reference generator responsive to a first programming signal applied externally, for generating a reference voltage corresponding to the first programming signal by using the power supply voltage;  
       a programmable output adjustor responsive to a second programming signal applied externally, for generating an output adjust voltage corresponding to the second programming signal by using the regulated output voltage;  
       an error amplifier for generating an error voltage corresponding to a difference between the reference voltage and the output adjust voltage; and  
       an output driver for driving the regulated output voltage in response to the error voltage;  
       wherein the reference generator, the programmable output adjustor and the error amplifier are switched on and off in response to a power saving control pulse signal applied externally.  
     
     
       26. The voltage regulator according to claim  25 , wherein the reference generator, the programmable output adjustor, and the error amplifier do not consume power when they turn off. 
     
     
       27. The voltage regulator according to claim  25 , wherein the output driver is switched on and off in response to an output enable control pulse signal applied externally. 
     
     
       28. The voltage regulator according to claim  27 , wherein a duty cycle of the output enable control pulse signal varies relative to a duty cycle of the power saving control pulse signal.