Interconnect passivation and metallization process optimized to maximize reflectance

Abstract

A metal surface having optimized reflectance is created utilizing the following process steps alone or in combination: 1) performing alloy/sintering of the metal-silicon interface prior to a chemical mechanical polish of the intermetal dielectric before the reflective metal electrode is formed; 2) chemical-mechanical polishing the intermetal dielectric layer again after vias are formed; 3) forming a metal adhesion layer composed of collimated titanium over the underlying dielectric; 4) depositing metal upon the adhesion layer at as low a temperature as feasible to maintain small grain size; 5) depositing at least the first layer of the reflectance enhancing coating on top of the freshly deposited metal prior to etching the metal; and 6) depositing the initial layer of the reflective enhancing coating at a temperature as close as possible to the temperature of formation of the metal electrode layer in order to suppress hillock formation in the metal. Deposition of the REC serves two distinct purposes. First, the REC coats the freshly deposited metal layer immediately following deposition, preserving the metal in its highly reflective state. Second, the REC generates constructive interference of light reflected by the metal layer. This constructive interference can generate reflectivity greater than that of the bare metal surface.

What is claimed is:  
     
       1. A process for forming a reflective electrode comprising the steps of: 
       forming a highest interconnect metallization layer over a silicon substrate having silicon-metal contacts;  
       forming a highest intermetal dielectric layer on top of the highest interconnect metallization;  
       heating the highest intermetal dielectric in the presence of hydrogen to alloy the silicon-metal contacts;  
       planarizing the highest intermetal dielectric after the heating step;  
       creating a via in the highest intermetal dielectric;  
       lining the walls of the via with a liner layer;  
       filling the via with an electrically conductive material;  
       forming an electrode adhesion layer on top of the highest level intermetal dielectric and the via;  
       forming an electrode layer on top of the electrode adhesion layer; and  
       forming a reflectance enhancing coating on top of the electrode layer, the reflectance enhancing coating generating constructive interference of light waves reflected by the electrode layer.  
     
     
       2. The process according to claim  1  wherein: 
       the step of forming the intermetal dielectric comprises the steps of forming a base oxide layer, forming an etchback layer over the base oxide layer, etching the etchback layer, and forming a cap oxide layer over the etchback layer and the base oxide layer; and  
       the step of planarizing the highest intermetal dielectric comprises the step of chemical mechanical polishing the cap oxide layer.  
     
     
       3. The process according to claim  2  further comprising the step of chemical mechanical polishing a top surface of the filled via prior to forming the electrode adhesion layer. 
     
     
       4. The process according to claim  3  wherein the step of forming an electrode adhesion layer includes forming a layer of collimated Titanium between approximately 100 Å and 400 Å thick. 
     
     
       5. The process according to claim  3  wherein the step of forming an electrode layer includes depositing metal at a first temperature, the first temperature maintained as low as possible such that the grain size and roughness of the electrode layer are minimized. 
     
     
       6. The process according to claim  5  wherein the step of forming an electrode layer includes depositing a mixture of approximately 99.5% aluminum and 0.5% copper by weight at a temperature of approximately 50° C. 
     
     
       7. The process according to claim  5  wherein the step of forming an electrode layer includes depositing a mixture of approximately 99.5% aluminum and 0.5% copper by weight at a temperature of approximately 175° C. 
     
     
       8. The process according to claim  5  wherein the step of forming a reflectance enhancing coating includes the step of forming a first dielectric film on top of the electrode layer immediately after formation of the electrode layer. 
     
     
       9. The process according to claim  8  wherein the step of forming a first dielectric film includes depositing the first dielectric film at a second temperature as close as possible to the first temperature, such that formation of hillocks in the electrode layer is suppressed. 
     
     
       10. The process according to claim  9  wherein 
       the step of forming an electrode layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 50° C., and  
       the step of forming the first dielectric film includes depositing the first dielectric film at a second temperature of approximately 300° C.  
     
     
       11. The process according to claim  9  wherein 
       the step of forming an electrode layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 175° C., and  
       the step of forming the first dielectric film includes depositing the first dielectric film at a second temperature of approximately 300° C.  
     
     
       12. The process according to claim  8  wherein the step of forming a reflectance enhancing coating further includes the steps of forming a first dielectric film of SiO 2  on top of the electrode layer, forming a second dielectric film of Si 3 N 4  on top of the first dielectric film, forming a third dielectric film of SiO 2  on top of the second dielectric film, and forming a fourth dielectric film of Si 3 N 4  on top of the third dielectric film. 
     
     
       13. A process for forming a reflective metal surface comprising the steps of: 
       providing a supporting surface having metal/semiconductor;  
       heating the supporting surface in presence of hydrogen to alloy the metal-semiconductor contacts;  
       chemical mechanical polishing the supporting surface after the heating step;  
       forming an adhesion layer;  
       depositing a metal layer on top of the adhesion layer at a first temperature, the first temperature as low as possible such that the grain size of the deposited metal layer is minimized;  
       depositing a reflectance enhancing coating immediately following deposition of the metal layer, the reflectance enhancing coating including a first dielectric film deposited on top of the metal layer at a second temperature as close as possible to the first temperature to suppress hillock formation in the metal layer, wherein the reflectance enhancing coating generates constructive interference of light waves reflected by the metal layer.  
     
     
       14. The process according to claim  13  wherein 
       the step of depositing the metal layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 175° C., and  
       the step of forming a reflectance enhancing coating includes depositing a first dielectric film at a second temperature of approximately 300° C.  
     
     
       15. The process according to claim  13  wherein 
       the step of depositing the metal layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 50° C., and  
       the step of forming a reflectance enhancing coating includes depositing a first dielectric film at a second temperature of approximately 300° C.  
     
     
       16. The process according to claim  13  wherein the step of forming a reflectance enhancing coating further includes the steps of forming a first dielectric film of SiO 2  on top of the electrode layer, forming a second dielectric film of Si 3 N 4  on top of the first dielectric film, forming a third dielectric film of SiO 2  on top of the second dielectric film, and forming a fourth dielectric film of Si 3 N 4  on top of the third dielectric film. 
     
     
       17. A process for forming a liquid crystal light valve having a plurality of reflective pixel electrodes, the process comprising the steps of: 
       forming a highest interconnect metallization layer over a silicon substrate having silicon-metal contacts;  
       forming a highest intermetal dielectric layer on top of the highest interconnect metallization;  
       heating the highest intermetal dielectric in the presence of hydrogen to alloy the silicon-metal contacts;  
       planarizing the highest intermetal dielectric after the heating step;  
       creating a via in the highest intermetal dielectric;  
       lining the walls of the via with a liner layer;  
       filling the via with an electrically conducting material;  
       forming an electrode adhesion layer on top of the highest level intermetal dielectric and the via;  
       forming an electrode layer on top of the electrode adhesion layer;  
       forming a reflectance enhancing coating on top of the electrode layer, the reflectance enhancing coating generating constructive interference of light waves reflected by the electrode layer; and  
       defining a plurality of electrically isolated reflective pixel electrodes by etching the reflectance enhancing coating, the electrode layer, and the pixel adhesion layer in selected regions.  
     
     
       18. The process according to claim  17  wherein: 
       the step of forming the intermetal dielectric comprises the steps of forming a base oxide layer, forming an etchback layer over the base oxide layer, etching the etchback layer, and forming a cap oxide layer over the etchback layer and the base oxide layer; and  
       the step of planarizing the highest intermetal dielectric comprises the step of chemical mechanical polishing the cap oxide layer.  
     
     
       19. The process according to claim  18  further comprising the step of chemical mechanical polishing a top surface of the filled via prior to forming the pixel adhesion layer. 
     
     
       20. The process according to claim  19  wherein the step of forming an electrode layer includes depositing a metal at a first temperature, the first temperature maintained as low as possible such that the grain size and roughness of the electrode layer are minimized. 
     
     
       21. The process according to claim  20  wherein the step of forming a reflectance enhancing coating includes the step of depositing a first dielectric film at a second temperature as close as possible to the first temperature, such that formation of hillocks in the pixel electrode layer is suppressed. 
     
     
       22. The process according to claim  21  wherein 
       the step of forming an electrode layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 50° C., and  
       the step of forming a first dielectric film includes depositing the first dielectric film at a second temperature of approximately 300° C.  
     
     
       23. The process according to claim  21  wherein the step of forming an electrode layer includes depositing a mixture of 99.5% aluminum and 0.5% copper by weight at a first temperature of approximately 175° C., and 
       the step of forming a first dielectric film includes depositing the first dielectric film at a second temperature of approximately 300° C.