Logic circuit having reduced power consumption

Abstract

A logic circuit which is driven at low voltage and operates at high speed and low power consumption is provided. Substrate potentials of P and N type transistors MP 11 and MN 11 constituting an inverter are controlled correspondingly to a stable state of the inverter. In a stable state of the inverter in which the P type transistor MP 11 is ON, the substrate potential of the N type transistor MN 11 which is OFF is lowered to ground potential or lower and, in a stable state of the inverter in which the N type transistor MN 11 is ON, the substrate potential of the P type transistor MP 11 which is OFF is raised to a power source potential or higher.

What is claimed is:  
     
       1. A logic circuit comprising: 
       an output node;  
       a first transistor of a first conductivity type connected between a first power source and said output node;  
       a second transistor of a second conductivity type connected between a second power source and said output node;  
       an input node connected to control electrodes of said first and second transistors;  
       a first control circuit for controlling a potential of a substrate of said first transistor in response to signals at said input node and output node without employing a potential of the signal at said output node; and  
       a second control circuit for controlling a potential of a substrate of said second transistor in response to said signals on said input node and output node.  
     
     
       2. A logic circuit comprising: 
       a first transistor of a first conductivity type connected between a first power source and an output node;  
       a second transistor of a second conductivity type connected between a second power source and said output node;  
       an input node connected to control electrodes of said first and second transistors;  
       a first control circuit for supplying a potential different from a source potential of said second transistor to said substrate of said second transistor in response to said first transistor being in a conductive state and said second transistor being in a non-conductive state; and  
       a second control circuit for supplying a potential different from a source potential of said first transistor to said substrate of said first transistor in response to said first transistor being in a non-conductive state and said second transistor being in a conductive state.  
     
     
       3. The logic circuit as claimed in claim  2 , wherein said first control circuit supplies a potential substantially equal to the source potential of said second transistor to said substrate of said second transistor in response to said first transistor being in said non-conductive state and a said second transistor being in said conductive state, and said second control circuit supplies a potential substantially equal to the source potential of said first transistor to said substrate of said first transistor in response to said first transistor being in said conductive state and a said second transistor being in said non-conductive state. 
     
     
       4. A logic circuit comprising: 
       a first transistor of a first conductivity type connected between a first power source and an output node;  
       a second transistor of a second conductivity type connected between a second power source and said output node;  
       first control circuit for supplying a first potential different from a potential of said second power source to a substrate of said second transistor when a potential of said output node is substantially the same potential as said first power source; and  
       second control circuit for supplying a second potential different from a potential of said first power source to a substrate of said first transistor when a potential of said output node is substantially the same potential as said second power source.  
     
     
       5. The logic circuit as claimed in claim  4 , wherein said first potential is lower than said potential of said second power source and said second potential is higher than said potential of said first power source. 
     
     
       6. A logic circuit comprising: 
       a first transistor of a first conductivity type connected between a first power source and an output node;  
       a second transistor of a second conductivity type connected between a second power source and said output node;  
       a third transistor of said first conductivity type connected between said first power source and a substrate of said first transistor;  
       a fourth transistor of said second conductivity type connected between said second power source and a substrate of said second transistor;  
       an input node connected to control electrodes of said first to fourth transistors;  
       a fifth transistor of said first conductivity type connected between a third power source and said substrate of said first transistor and having a control electrode connected to said output node; and  
       a sixth transistor of said second conductivity type connected between a fourth power source and said substrate of said second transistor and having a control electrode connected to said output node.  
     
     
       7. The logic circuit as claimed in claim  6 , wherein a potential of said third power source is higher than a potential of any of said first, second and fourth power source and a potential of said fourth power source is lower than a potential of any of said first, second and third power source. 
     
     
       8. A logic circuit comprising: 
       a first and second transistors of a first conductivity type connected in parallel between a first power source and an output node;  
       a third and fourth transistors of a second conductivity type connected in series between a second power source and said output node;  
       a fifth and sixth transistors of said first conductivity type connected in parallel between said first power source and at least one of substrates of said first and second transistors;  
       a seventh and eighth transistors of said second conductivity type connected in series between said second power source and at least one of substrates of said third and fourth transistors;  
       a first input node connected to control electrodes of said first, third, fifth and seventh transistors;  
       a second input node connected to control electrodes of said second, fourth, sixth and eighth transistors;  
       a ninth transistor of said first conductivity type connected between a third power source and at least one of said substrates of said first and second transistors and having a control electrode connected to said output node; and  
       a tenth transistor of said second conductivity type connected between a fourth power source and at least one of said substrates of said third and fourth transistors and having a control electrode connected to said output terminal.  
     
     
       9. A logic circuit comprising a first power source, an output node, a transistor connected between said first power source and said output node, an input node connected to control electrode of said transistor, and a control circuit for controlling a potential of a substrate of said transistor in response to signals at said input node and output node without employing a potential of said output node as a potential of the substrate of said transistor. 
     
     
       10. A logic circuit comprising: 
       a first power source;  
       an output node;  
       a resistor connected between said first power source and said output node;  
       a first transistor connected between said output node and a second power source;  
       a second transistor connected between a substrate of said first transistor and said second power source;  
       an input node connected to control electrodes of said first and second transistors; and  
       a third transistor connected between said substrate of said first transistor and said second power source and having a control electrode connected to said output node.